Steven Hsu

1.6k citations

71 papers · 1.2k indexed · h-index 19

Electrical and Electronic Engineering top 5%
Hardware and Architecture top 1%
Artificial Intelligence top 5%
Computer Networks and Communications top 10%
Biomedical Engineering

Co-authors: Ram Krishnamurthy Mark Anders Amit Agarwal Shekhar Borkar Himanshu Kaul Sanu Mathew Sudhir Satpathy Kaushik Roy
Topics: Low-power high-performance VLSI design (25 papers)Advancements in Semiconductor Devices and Circuit Design (22 papers)Semiconductor materials and devices (21 papers)
Cited by: Hardware and Architecture Electrical and Electronic Engineering Artificial Intelligence
Journals: Applied Physics Letters IEEE Journal of Solid-State Circuits IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Partner nations: United States Taiwan Canada

In The Last Decade

Steven Hsu

69 papers receiving 1.2k citations

Peers

Countries citing papers authored by Steven Hsu

Since Specialization

Citations

This map shows the geographic impact of Steven Hsu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Steven Hsu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Steven Hsu more than expected).

Fields of papers citing papers by Steven Hsu

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Steven Hsu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Steven Hsu. The network helps show where Steven Hsu may publish in the future.

Co-authorship network of co-authors of Steven Hsu

This figure shows the co-authorship network connecting the top 25 collaborators of Steven Hsu. A scholar is included among the top collaborators of Steven Hsu based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Steven Hsu. Steven Hsu is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A 7Gbps SCA-Resistant Multiplicative-Masked AES Engine in Intel 4 CMOS 2022 ·2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ·Raghavan Kumar,Vikram Suresh,Sachin Taneja,Mark Anders,Steven Hsu,Amit Agarwal,Vivek De,Sanu Mathew	2
2	Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities 2021 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Sriram Vangal,Somnath Paul,Steven Hsu,Amit Agarwal,Saurabh Kumar,Ram Krishnamurthy,Harish K. Krishnamurthy,James Tschanz,Vivek De,Chris H. Kim	8
3	A 4900-$\mu$ m² 839-Mb/s Side-Channel Attack- Resistant AES-128 in 14-nm CMOS With Heterogeneous Sboxes, Linear Masked MixColumns, and Dual-Rail Key Addition 2020 ·IEEE Journal of Solid-State Circuits ·Raghavan Kumar,Vikram Suresh,Monodeep Kar,Sudhir Satpathy,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Gregory K. Chen,Ram Krishnamurthy,Vivek De,Sanu Mathew	17
4	A Microwatt-Class Always-On Sensor Fusion Engine Featuring Ultra-Low-Power AOI Clocked Circuits in 14nm CMOS 2019 ·Steven Hsu,Amit Agarwal,Monodeep Kar,Mark Anders,Himanshu Kaul,Raghavan Kumar,Sudhir Satpathy,Vikram Suresh,Sanu Mathew,Ram Krishnamurthy,Vivek De	3
5	A 4900×m² 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition 2019 ·Raghavan Kumar,Vikram Suresh,Monodeep Kar,Sudhir Satpathy,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Gregory Chen,Ram Krishnamurthy,Vivek De,Sanu Mathew	2
6	A 250Mv, 0.063J/Ghash Bitcoin Mining Engine in 14nm CMOS Featuring Dual-Vcc Sha256 Datapath and 3-Phase Latch Based Clocking 2019 ·Vikram Suresh,Sudhir Satpathy,Raghavan Kumar,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Ram Krishnamurthy,Vivek De,Sanu Mathew	5
7	Ultra-Lightweight 548–1080 Gate 166Gbps/W–12.6Tbps/W SIMON 32/64 Cipher Accelerators for IoT in 14nm Tri-gate CMOS 2018 ·Himanshu Kaul,Mark Anders,Sanu Mathew,Vikram Suresh,Sudhir Satpathy,Amit Agarwal,Steven Hsu,Ram Krishnamurthy	4
8	34.4Mbps 1.56Tbps/W DEFLATE Decompression Accelerator Featuring Block-Adaptive Huffman Decoder in 14nm Tri-Gate CMOS for IoT Platforms 2018 ·Sudhir Satpathy,Sanu Mathew,Vikram Suresh,(unknown),(unknown),Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,(unknown)	8
9	A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware Accelerator in 14nm Tri-Gate CMOS 2018 ·Vikram Suresh,Sudhir Satpathy,Sanu Mathew,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Ram Krishnamurthy	4
10	An All-Digital Unified Static/Dynamic Entropy Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction for Secure Privacy-Preserving Mutual Authentication in IoT Mote Platforms 2018 ·Sudhir Satpathy,Sanu Mathew,Vikram Suresh,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Ram Krishnamurthy,Vivek De	14
11	A New Figure of Merit, ${\Delta V_{\text {DIBLSS}} /(I_{\rm {d},{\mathrm{ sat}}} /I_{\rm {sd},{\mathrm{ leak}}} )}$ , to Characterize Short-Channel Performance of a Bulk-Si n-Channel FinFET Device 2016 ·IEEE Journal of the Electron Devices Society ·(unknown),(unknown),(unknown),Steven Hsu,(unknown),(unknown),Chih-Wei Yang,Chien-Ting Lin,(unknown),(unknown),(unknown),Pei‐Wen Wang,Chia‐Jung Hsu,(unknown),(unknown),Osbert Cheng,(unknown)	6
12	340 mV–1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS 2015 ·IEEE Journal of Solid-State Circuits ·Sanu Mathew,Sudhir Satpathy,Vikram Suresh,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Gregory Chen,Ram Krishnamurthy	106
13	340mV–1.1V, 289Gbps/W, 2090-gate NanoAES hardware accelerator with area-optimized encrypt/decrypt GF(2<sup>4</sup>)<sup>2</sup> polynomials in 22nm tri-gate CMOS 2014 ·Sanu Mathew,Sudhir Satpathy,Vikram Suresh,Himanshu Kaul,Mark Anders,(unknown),Amit Agarwal,Steven Hsu,Ram Krishnamurthy	9
14	A 128×128b high-speed wide-and match-line content addressable memory in 32nm CMOS 2011 ·Amit Agarwal,Steven Hsu,Sanu Mathew,Mark Anders,Himanshu Kaul,Farhana Sheikh,Ram Krishnamurthy	28
15	A Novel “hybrid” high-k/metal gate process for 28nm high performance CMOSFETs 2009 ·Olivier Lai,(unknown),Liwei Cheng,(unknown),(unknown),(unknown),Chu-Yang Chou,(unknown),(unknown),Steven Hsu,(unknown),(unknown),Jen Fin Lin,(unknown),(unknown),(unknown)	8
16	A 320mV 56μW 411GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65nm CMOS 2008 ·Himanshu Kaul,Mark Anders,Sanu Mathew,Steven Hsu,Amit Agarwal,Ram Krishnamurthy,Shekhar Borkar	31
17	A 1.9Gb/s 358mW 16-to-256 State Reconfigurable Viterbi Accelerator in 9Onm CMOS 2007 ·Mark Anders,Sanu Mathew,Steven Hsu,Ram Krishnamurthy,Shekhar Borkar	2
18	A 2.4GHz 256/1024-bit Encryption Accelerator reconfigurable Montgomery multiplier in 90nm CMOS 2007 ·Sanu Mathew,David Harris,Mark Anders,Steven Hsu,Ram Krishnamurthy	1
19	A process variation compensating technique for sub-90 nm dynamic circuits 2004 ·C.H. Kim,Kaushik Roy,Steven Hsu,Atila Alvandpour,Ram Krishnamurthy,Shekhar Borkar	34
20	Dynamic addressing memory arrays with physical locality 2002 ·Steven Hsu,Shih‐Lien Lu,(unknown),Ram Krishnamurthy,Konrad Lai	3

About Steven Hsu

Steven Hsu is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Graphics and Computer-Aided Design, having authored 71 papers that have together received 1.2k indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (25 papers), Advancements in Semiconductor Devices and Circuit Design (22 papers) and Semiconductor materials and devices (21 papers). The work is most often cited by research in Hardware and Architecture (537 citations), Electrical and Electronic Engineering (868 citations) and Artificial Intelligence (269 citations). Steven Hsu has collaborated with scholars based in United States, Taiwan and Canada. Frequent co-authors include Ram Krishnamurthy, Mark Anders, Amit Agarwal, Shekhar Borkar, Himanshu Kaul, Sanu Mathew, Sudhir Satpathy, Kaushik Roy, Vikram Suresh and Farhana Sheikh. Their work appears in journals such as Applied Physics Letters, IEEE Journal of Solid-State Circuits and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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