Monodeep Kar

1.0k citations

48 papers · 625 indexed · h-index 15

Artificial Intelligence top 5%
Hardware and Architecture top 2%
Electrical and Electronic Engineering
Computer Vision and Pattern Recognition top 5%
Signal Processing top 10%

Co-authors: Saibal Mukhopadhyay Arvind Singh Vivek De Anand Prem Rajan Sanu Mathew Jong Hwan Ko Venkata Chaitanya Krishna Chekuri Mark Anders
Topics: Cryptographic Implementations and Security (21 papers)Physical Unclonable Functions (PUFs) and Hardware Security (21 papers)Chaos-based Image/Signal Encryption (12 papers)
Cited by: Hardware and Architecture Artificial Intelligence Computer Vision and Pattern Recognition
Journals: IEEE Transactions on Power Electronics IEEE Journal of Solid-State Circuits IEEE Internet of Things Journal
Partner nations: United States India Switzerland

In The Last Decade

Monodeep Kar

46 papers receiving 616 citations

Peers

Countries citing papers authored by Monodeep Kar

Since Specialization

Citations

This map shows the geographic impact of Monodeep Kar's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Monodeep Kar with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Monodeep Kar more than expected).

Fields of papers citing papers by Monodeep Kar

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Monodeep Kar. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Monodeep Kar. The network helps show where Monodeep Kar may publish in the future.

Co-authorship network of co-authors of Monodeep Kar

This figure shows the co-authorship network connecting the top 25 collaborators of Monodeep Kar. A scholar is included among the top collaborators of Monodeep Kar based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Monodeep Kar. Monodeep Kar is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOS 2023 ·Ankur Agrawal,Monodeep Kar,Kyu Hyun Kim,S.V. Rylov,Jinwook Jung,Seiji Munetoh,Kohji Hosokawa,Xin Zhang,(unknown),Fabio Carta,(unknown),(unknown),Mingu Kang,Sunil Shukla,Kailash Gopalakrishnan,Leland Chang	2
2	VDPred: Predicting Voltage Droop for Power-Effient 3D Multi-core Processor Design 2021 ·Xiao He,Monodeep Kar,Saibal Mukhopadhyay,Sudhakar Yalamanchili	0
3	A 4900-$\mu$ m² 839-Mb/s Side-Channel Attack- Resistant AES-128 in 14-nm CMOS With Heterogeneous Sboxes, Linear Masked MixColumns, and Dual-Rail Key Addition 2020 ·IEEE Journal of Solid-State Circuits ·Raghavan Kumar,Vikram Suresh,Monodeep Kar,Sudhir Satpathy,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Gregory K. Chen,Ram Krishnamurthy,Vivek De,Sanu Mathew	17
4	A 9.0-TOPS/W Hash-Based Deep Neural Network Accelerator Enabling 128× Model Compression in 10-nm FinFET CMOS 2020 ·IEEE Solid-State Circuits Letters ·Raghavan Kumar,Gregory K. Chen,H. Ekin Sumbul,Phil Knag,Mark Anders,Himanshu Kaul,Steven K. Hsu,Amit Agarwal,Monodeep Kar,Seongjong Kim,Vikram Suresh,Ram Krishnamurthy,Vivek De,Sanu Mathew	3
5	25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating Range 2020 ·Mark Anders,Himanshu Kaul,Seongjong Kim,Gregory K. Chen,Raghavan Kumar,H. Ekin Sumbul,Phil Knag,Monodeep Kar,Steven K. Hsu,Amit Agarwal,Vikram Suresh,Sanu Mathew,Ram Krishnamurthy,Vivek De	3
6	A Microwatt-Class Always-On Sensor Fusion Engine Featuring Ultra-Low-Power AOI Clocked Circuits in 14nm CMOS 2019 ·Steven Hsu,Amit Agarwal,Monodeep Kar,Mark Anders,Himanshu Kaul,Raghavan Kumar,Sudhir Satpathy,Vikram Suresh,Sanu Mathew,Ram Krishnamurthy,Vivek De	3
7	A 4900×m² 839Mbps Side-Channel Attack Resistant AES-128 in 14nm CMOS with Heterogeneous Sboxes, Linear Masked MixColumns and Dual-Rail Key Addition 2019 ·Raghavan Kumar,Vikram Suresh,Monodeep Kar,Sudhir Satpathy,Mark Anders,Himanshu Kaul,Amit Agarwal,Steven Hsu,Gregory Chen,Ram Krishnamurthy,Vivek De,Sanu Mathew	2
8	Enhanced Power and Electromagnetic SCA Resistance of Encryption Engines via a Security-Aware Integrated All-Digital LDO 2019 ·IEEE Journal of Solid-State Circuits ·Arvind Singh,Monodeep Kar,Venkata Chaitanya Krishna Chekuri,Sanu Mathew,Anand Prem Rajan,Vivek De,Saibal Mukhopadhyay	39
9	Reducing Power Side-Channel Information Leakage of AES Engines Using Fully Integrated Inductive Voltage Regulator 2018 ·IEEE Journal of Solid-State Circuits ·Monodeep Kar,Arvind Singh,Sanu Mathew,Anand Prem Rajan,Vivek De,Saibal Mukhopadhyay	50
10	Multigated Carbon Nanotube Field Effect Transistors-Based Physically Unclonable Functions As Security Keys 2018 ·IEEE Internet of Things Journal ·(unknown),(unknown),Monodeep Kar,Suresh K. Sitaraman,Saibal Mukhopadhyay,Satish Kumar	19
11	Performance based tuning of an inductive integrated voltage regulator driving a digital core against process and passive variations 2018 ·Venkata Chaitanya Krishna Chekuri,Monodeep Kar,Arvind Singh,Saibal Mukhopadhyay	3
12	Improved Power/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage Dithering 2018 ·IEEE Journal of Solid-State Circuits ·Arvind Singh,Monodeep Kar,Sanu Mathew,Anand Prem Rajan,Vivek De,Saibal Mukhopadhyay	54
13	Energy efficient and side-channel secure hardware architecture for lightweight cipher SIMON 2018 ·Arvind Singh,(unknown),Monodeep Kar,Saibal Mukhopadhyay	5
14	A case for low frequency single cycle multi hop NoCs for energy efficiency and high performance 2017 ·International Conference on Computer Aided Design ·Monodeep Kar,Tushar Krishna	3
15	An All-Digital Fully Integrated Inductive Buck Regulator With A 250-MHz Multi-Sampled Compensator and a Lightweight Auto-Tuner in 130-nm CMOS 2017 ·IEEE Journal of Solid-State Circuits ·Monodeep Kar,Arvind Singh,Anand Prem Rajan,Vivek De,Saibal Mukhopadhyay	35
16	Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities 2017 ·Monodeep Kar,Arvind Singh,Sanu Mathew,Anand Prem Rajan,Vivek De,Saibal Mukhopadhyay	6
17	Improved power side channel attack resistance of a 128-bit AES engine with random fast voltage dithering 2017 ·Arvind Singh,Monodeep Kar,Sanu Mathew,Anand Prem Rajan,Vivek De,Saibal Mukhopadhyay	14
18	What does ultra low power requirements mean for side-channel secure cryptography? 2016 ·Monodeep Kar,Arvind Singh,Anand Prem Rajan,Vivek De,Saibal Mukhopadhyay	3
19	Impact of process variation in inductive integrated voltage regulator on delay and power of digital circuits 2014 ·Monodeep Kar,(unknown),Harish K. Krishnamurthy,Saibal Mukhopadhyay	10
20	Techniques for reducing parasitic loss in switched-capacitor based DC-DC converter 2013 ·Avishek Biswas,Monodeep Kar,Pradip Kumar Mandal	5

About Monodeep Kar

Monodeep Kar is a scholar working on Hardware and Architecture, Artificial Intelligence and Computer Vision and Pattern Recognition, having authored 48 papers that have together received 625 indexed citations. Recurring topics across this work include Cryptographic Implementations and Security (21 papers), Physical Unclonable Functions (PUFs) and Hardware Security (21 papers) and Chaos-based Image/Signal Encryption (12 papers). The work is most often cited by research in Hardware and Architecture (374 citations), Artificial Intelligence (386 citations) and Computer Vision and Pattern Recognition (186 citations). Monodeep Kar has collaborated with scholars based in United States, India and Switzerland. Frequent co-authors include Saibal Mukhopadhyay, Arvind Singh, Vivek De, Anand Prem Rajan, Sanu Mathew, Jong Hwan Ko, Venkata Chaitanya Krishna Chekuri, Mark Anders, Himanshu Kaul and Amit Agarwal. Their work appears in journals such as IEEE Transactions on Power Electronics, IEEE Journal of Solid-State Circuits and IEEE Internet of Things Journal.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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