D. Finan

2.7k total citations · 2 hit papers
9 papers, 1.6k citations indexed

About

D. Finan is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Hardware and Architecture. According to data from OpenAlex, D. Finan has authored 9 papers receiving a total of 1.6k indexed citations (citations by other indexed papers that have themselves been cited), including 7 papers in Electrical and Electronic Engineering, 5 papers in Computer Networks and Communications and 3 papers in Hardware and Architecture. Recurrent topics in D. Finan's work include Low-power high-performance VLSI design (6 papers), Interconnection Networks and Systems (5 papers) and Advancements in Semiconductor Devices and Circuit Design (3 papers). D. Finan is often cited by papers focused on Low-power high-performance VLSI design (6 papers), Interconnection Networks and Systems (5 papers) and Advancements in Semiconductor Devices and Circuit Design (3 papers). D. Finan collaborates with scholars based in United States, Sweden and India. D. Finan's co-authors include Shekhar Borkar, Tanay Karnik, B. Bloechel, Yatin Hoskote, Nitin Borkar, James Tschanz, P. Hazucha, Saurabh Dighe, Jason Howard and Tiju Jacob and has published in prestigious journals such as IEEE Journal of Solid-State Circuits.

In The Last Decade

D. Finan

9 papers receiving 1.5k citations

Hit Papers

An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS 2007 2026 2013 2019 2007 2008 100 200 300 400

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
D. Finan United States 9 1.2k 839 761 440 110 9 1.6k
Sriram Vangal United States 15 1.4k 1.2× 1.3k 1.6× 1.2k 1.6× 131 0.3× 245 2.2× 29 2.0k
R. Ho United States 14 1.6k 1.4× 1.4k 1.7× 1.0k 1.4× 118 0.3× 198 1.8× 20 2.2k
Vasantha Erraguntla United States 14 831 0.7× 838 1.0× 834 1.1× 81 0.2× 99 0.9× 20 1.3k
K. Bernstein United States 13 1.8k 1.6× 286 0.3× 358 0.5× 226 0.5× 54 0.5× 22 1.9k
Jason Howard United States 13 1.0k 0.9× 1.3k 1.5× 1.2k 1.5× 58 0.1× 150 1.4× 24 1.8k
Saurabh Dighe United States 10 1.0k 0.9× 1.2k 1.5× 1.2k 1.5× 54 0.1× 150 1.4× 13 1.7k
Dinesh Somasekhar United States 21 1.5k 1.3× 225 0.3× 553 0.7× 260 0.6× 25 0.2× 52 1.7k
Kimiyoshi Usami Japan 19 1.4k 1.2× 391 0.5× 777 1.0× 254 0.6× 20 0.2× 107 1.6k
Wen-Ben Jone United States 14 615 0.5× 389 0.5× 540 0.7× 49 0.1× 108 1.0× 73 825
Federico Angiolini Italy 23 785 0.7× 1.3k 1.6× 1.1k 1.4× 45 0.1× 162 1.5× 60 1.5k

Countries citing papers authored by D. Finan

Since Specialization
Citations

This map shows the geographic impact of D. Finan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Finan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Finan more than expected).

Fields of papers citing papers by D. Finan

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by D. Finan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Finan. The network helps show where D. Finan may publish in the future.

Co-authorship network of co-authors of D. Finan

This figure shows the co-authorship network connecting the top 25 collaborators of D. Finan. A scholar is included among the top collaborators of D. Finan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with D. Finan. D. Finan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

9 of 9 papers shown
1.
Vangal, Sriram, Jason Howard, Greg Ruhl, et al.. (2008). An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS. IEEE Journal of Solid-State Circuits. 43(1). 29–41. 466 indexed citations breakdown →
2.
Vangal, Sriram, Jason Howard, Saurabh Dighe, et al.. (2007). An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS. 98–589. 474 indexed citations breakdown →
3.
Tschanz, James, Nam Sung Kim, Saurabh Dighe, et al.. (2007). Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging. 292–604. 156 indexed citations
4.
Hazucha, P., et al.. (2005). Area-efficient linear regulator with ultra-fast load regulation. IEEE Journal of Solid-State Circuits. 40(4). 933–940. 445 indexed citations
5.
Hazucha, P., et al.. (2004). An area-efficient, integrated, linear regulator with ultra-fast load regulation. 218–221. 12 indexed citations
6.
Vangal, Sriram, Yatin Hoskote, Dinesh Somasekhar, et al.. (2003). A 5 GHz floating point multiply-accumulator in 90 nm dual V/sub T/ CMOS. 1. 334–497. 15 indexed citations
7.
Hoskote, Yatin, B. Bloechel, G. Dermer, et al.. (2003). A TCP offload accelerator for 10 Gb/s ethernet in 90-nm CMOS. IEEE Journal of Solid-State Circuits. 38(11). 1866–1875. 30 indexed citations
8.
Hoskote, Yatin, Vasantha Erraguntla, D. Finan, et al.. (2003). A 10GHz TCP offload accelerator for 10Gb/s Ethernet in 90nm dual-V/sub T/ CMOS. 1. 258–492. 10 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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