Dinesh Somasekhar

2.3k total citations
52 papers, 1.7k citations indexed

About

Dinesh Somasekhar is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Dinesh Somasekhar has authored 52 papers receiving a total of 1.7k indexed citations (citations by other indexed papers that have themselves been cited), including 50 papers in Electrical and Electronic Engineering, 15 papers in Hardware and Architecture and 8 papers in Biomedical Engineering. Recurrent topics in Dinesh Somasekhar's work include Low-power high-performance VLSI design (37 papers), Advancements in Semiconductor Devices and Circuit Design (21 papers) and Semiconductor materials and devices (21 papers). Dinesh Somasekhar is often cited by papers focused on Low-power high-performance VLSI design (37 papers), Advancements in Semiconductor Devices and Circuit Design (21 papers) and Semiconductor materials and devices (21 papers). Dinesh Somasekhar collaborates with scholars based in United States, India and Sweden. Dinesh Somasekhar's co-authors include Kaushik Roy, Mark C. Johnson, Vivek De, Tanay Karnik, Arijit Raychowdhury, Shih‐Lien Lu, Muhammad Khellah, James Tschanz, Wei Wu and Lih‐Yih Chiou and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

Dinesh Somasekhar

51 papers receiving 1.6k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Dinesh Somasekhar United States 21 1.5k 553 260 225 148 52 1.7k
Sang Phill Park United States 23 1.8k 1.2× 495 0.9× 257 1.0× 139 0.6× 195 1.3× 32 1.9k
K. Bernstein United States 13 1.8k 1.2× 358 0.6× 226 0.9× 286 1.3× 75 0.5× 22 1.9k
Kerry Bernstein United States 9 867 0.6× 267 0.5× 97 0.4× 209 0.9× 102 0.7× 11 969
Marco Lanuzza Italy 23 1.4k 0.9× 310 0.6× 474 1.8× 128 0.6× 215 1.5× 133 1.7k
Chih-Kong Ken Yang United States 28 2.2k 1.4× 313 0.6× 929 3.6× 159 0.7× 118 0.8× 123 2.3k
Praveen Raghavan Belgium 19 1.5k 0.9× 275 0.5× 230 0.9× 285 1.3× 138 0.9× 142 1.7k
Greg Yeric United States 18 1.3k 0.8× 338 0.6× 116 0.4× 137 0.6× 53 0.4× 45 1.4k
Y. Nakagome Japan 19 1.5k 1.0× 380 0.7× 376 1.4× 161 0.7× 40 0.3× 59 1.6k
Brian Cline United States 20 1.5k 1.0× 429 0.8× 169 0.7× 153 0.7× 36 0.2× 60 1.6k
B. Courtois France 19 1.1k 0.7× 708 1.3× 201 0.8× 125 0.6× 79 0.5× 78 1.3k

Countries citing papers authored by Dinesh Somasekhar

Since Specialization
Citations

This map shows the geographic impact of Dinesh Somasekhar's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Dinesh Somasekhar with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Dinesh Somasekhar more than expected).

Fields of papers citing papers by Dinesh Somasekhar

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Dinesh Somasekhar. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Dinesh Somasekhar. The network helps show where Dinesh Somasekhar may publish in the future.

Co-authorship network of co-authors of Dinesh Somasekhar

This figure shows the co-authorship network connecting the top 25 collaborators of Dinesh Somasekhar. A scholar is included among the top collaborators of Dinesh Somasekhar based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Dinesh Somasekhar. Dinesh Somasekhar is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Park, Sang Phill, Dinesh Somasekhar, Young Moon Kim, et al.. (2016). System-Level Power Analysis of a Multicore Multipower Domain Processor With ON-Chip Voltage Regulators. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24(12). 3468–3476. 11 indexed citations
2.
Raychowdhury, Arijit, Dinesh Somasekhar, James Tschanz, & Vivek De. (2012). A fully-digital phase-locked low dropout regulator in 32nm CMOS. 148–149. 16 indexed citations
3.
Wu, Wei, Dinesh Somasekhar, & Shih‐Lien Lu. (2011). Direct Compare of Information Coded With Error-Correcting Codes. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 20(11). 2147–2151. 11 indexed citations
4.
Augustine, Charles, Arijit Raychowdhury, Dinesh Somasekhar, et al.. (2011). Design Space Exploration of Typical STT MTJ Stacks in Memory Arrays in the Presence of Variability and Disturbances. IEEE Transactions on Electron Devices. 58(12). 4333–4343. 15 indexed citations
5.
Wilkerson, Chris, Alaa R. Alameldeen, Zeshan Chishti, et al.. (2010). Reducing cache power with low-cost, multi-bit error-correcting codes. ACM SIGARCH Computer Architecture News. 38(3). 83–93. 44 indexed citations
6.
Somasekhar, Dinesh, et al.. (2010). Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process. IEEE Journal of Solid-State Circuits. 45(4). 751–758. 56 indexed citations
7.
Khellah, Muhammad, Diaa Khalil, Dinesh Somasekhar, et al.. (2007). Effect of Power Supply Noise on SRAM Dynamic Stability. 76–77. 22 indexed citations
8.
Khellah, Muhammad, Dinesh Somasekhar, Nam Sung Kim, et al.. (2007). A 256-Kb Dual-${V}_{\rm CC}$ SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor. IEEE Journal of Solid-State Circuits. 42(1). 233–242. 45 indexed citations
9.
Khellah, Muhammad, Nam Sung Kim, Jason Howard, et al.. (2006). A 4.2GHz 0.3mm2 256kb Dual-V/sub cc/ SRAM Building Block in 65nm CMOS. 2572–2581. 23 indexed citations
10.
Khellah, Muhammad, Y. Ye, Dinesh Somasekhar, et al.. (2006). Wordline & Bitline Pulsing Schemes for Improving SRAM Cell Stability in Low-Vcc 65nm CMOS Designs. 9–10. 64 indexed citations
11.
12.
Alvandpour, Atila, Dinesh Somasekhar, Ram Krishnamurthy, et al.. (2004). Bitline leakage equalization for sub-100nm caches. 401–404. 21 indexed citations
13.
Vangal, Sriram, Yatin Hoskote, Dinesh Somasekhar, et al.. (2003). A 5 GHz floating point multiply-accumulator in 90 nm dual V/sub T/ CMOS. 1. 334–497. 15 indexed citations
14.
Somasekhar, Dinesh, Shih‐Lien Lu, B. Bloechel, et al.. (2002). Planar 1T-cell DRAM with MOS storage capacitors in a 130nm logic technology for high density microprocessors caches. European Solid-State Circuits Conference. 127–130. 4 indexed citations
15.
Johnson, Mark C., Dinesh Somasekhar, Lih‐Yih Chiou, & Kaushik Roy. (2002). Leakage control with efficient use of transistor stacks in single threshold CMOS. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 10(1). 1–5. 139 indexed citations
16.
Solomatnikov, Alex, Dinesh Somasekhar, Kaushik Roy, & Cheng‐Kok Koh. (2000). Skewed CMOS: Noise-immune high-performance low-power static circuit family. 241–246. 30 indexed citations
17.
Johnson, Mark C., Dinesh Somasekhar, & Kaushik Roy. (1999). Models and algorithms for bounds on leakage in CMOS circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 18(6). 714–725. 156 indexed citations
18.
Somasekhar, Dinesh & Kaushik Roy. (1998). LVDCSL: a high fan-in, high-performance, low-voltage differential current switch logic family. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 6(4). 573–577. 8 indexed citations
19.
Ye, Yibin, Dinesh Somasekhar, & Kaushik Roy. (1996). On The D esign of Adiabatic SRAM s. Purdue e-Pubs (Purdue University System).
20.
Somasekhar, Dinesh & V. Visvanathan. (1993). A 230 MHz Half Bit Level Pipelined Multiplier using True Single Phase Clocking. sc 24. 347–350. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Breakdown of academic impact, for papers by Sang Phill Park Breakdown of academic impact, for papers by K. Bernstein Breakdown of academic impact, for papers by Kerry Bernstein Breakdown of academic impact, for papers by Marco Lanuzza Breakdown of academic impact, for papers by Chih-Kong Ken Yang Breakdown of academic impact, for papers by Praveen Raghavan Breakdown of academic impact, for papers by Greg Yeric Breakdown of academic impact, for papers by Y. Nakagome Breakdown of academic impact, for papers by Brian Cline Breakdown of academic impact, for papers by B. Courtois
Rankless by CCL
2026