S. Narendra

7.4k total citations · 2 hit papers
84 papers, 5.4k citations indexed

About

S. Narendra is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, S. Narendra has authored 84 papers receiving a total of 5.4k indexed citations (citations by other indexed papers that have themselves been cited), including 77 papers in Electrical and Electronic Engineering, 18 papers in Biomedical Engineering and 12 papers in Hardware and Architecture. Recurrent topics in S. Narendra's work include Low-power high-performance VLSI design (54 papers), Advancements in Semiconductor Devices and Circuit Design (49 papers) and Semiconductor materials and devices (40 papers). S. Narendra is often cited by papers focused on Low-power high-performance VLSI design (54 papers), Advancements in Semiconductor Devices and Circuit Design (49 papers) and Semiconductor materials and devices (40 papers). S. Narendra collaborates with scholars based in United States, India and Canada. S. Narendra's co-authors include Vivek De, Shekhar Borkar, Anantha P. Chandrakasan, A. Keshavarzi, Tanay Karnik, Jim Tschanz, D.A. Antoniadis, James Tschanz, James Kao and B. Bloechel and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

S. Narendra

84 papers receiving 5.1k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Parameter variations and impact on circuits and microarchitecture

2003 1.1k citations Shekhar Borkar, Tanay Karnik et al. profile →
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage

2002 548 citations James Tschanz, James Kao et al. IEEE Journal of Solid-State Circuits profile →

Peers

Countries citing papers authored by S. Narendra

Since Specialization

Citations

This map shows the geographic impact of S. Narendra's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Narendra with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Narendra more than expected).

Fields of papers citing papers by S. Narendra

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Narendra. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Narendra. The network helps show where S. Narendra may publish in the future.

Co-authorship network of co-authors of S. Narendra

This figure shows the co-authorship network connecting the top 25 collaborators of S. Narendra. A scholar is included among the top collaborators of S. Narendra based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S. Narendra. S. Narendra is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

#	Work	Indexed citations
1	FPGA Based Accident Detection and Monitoring System for Safety Traffic 2020 ·International Journal of Recent Technology and Engineering (IJRTE) ·(unknown), (unknown), K. Seetharam, S. Narendra	1
2	A Survey of Data Hiding Techniques 2018 ·International Journal of Computer Applications ·(unknown), Sanjay Silakari, S. Narendra	1
3	Through the Looking Glass?The 2015 Edition: Trends in Solid-State Circuits from ISSCC 2015 ·IEEE Solid-State Circuits Magazine ·S. Narendra, (unknown), K.C. Smith	27
4	ISSCC 2014?Silicon Systems Bridging the Cloud [Conference Reports] 2013 ·IEEE Solid-State Circuits Magazine ·S. Narendra, (unknown)	1
5	The semiconductor industry in 2025. 2010 ·A.J. Bhavnagarwala, Shekhar Borkar, Takayasu Sakurai, S. Narendra	1
6	Design methodology for Carbon Nanotube based circuits in the presence of metallic tubes 2010 ·(unknown), (unknown), Malgorzata Chrzanowska-Jeske, S. Narendra	6
7	EP2: The semiconductor industry in 2025 2010 ·A.J. Bhavnagarwala, Shekhar Borkar, Takayasu Sakurai, S. Narendra	1
8	Carbon nanotube circuit design choices in the presence of metallic tubes 2008 ·(unknown), Malgorzata Chrzanowska-Jeske, S. Narendra	13
9	Leakage in Nanometer CMOS Technologies (Series on Integrated Circuits and Systems) 2005 ·Springer eBooks ·S. Narendra, Anantha P. Chandrakasan	44
10	Cascode Monolithic DC-DC Converter for Reliable Operation at High Input Voltages 2005 ·Analog Integrated Circuits and Signal Processing ·Volkan Kursun, S. Narendra, Vivek De, Eby G. Friedman	10
11	Cascode Buffer for Monolithic Voltage Conversion Operating at High Input Supply Voltages 2005 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·Volkan Kursun, G. Schrom, Vivek De, Eby G. Friedman, S. Narendra	13
12	5GHz 32b integer-execution core in 130nm dual-V/sub T/ CMOS 2005 ·2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) ·(unknown), Nitin Borkar, Erik Seligman, (unknown), Vasantha Erraguntla, H. Wilson, (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), B. Bloechel, G. Dermer, (unknown), S. Narendra, (unknown), (unknown), Vivek De, Shekhar Borkar	1
13	A 480-MHz, multi-phase interleaved buck DC-DC converter with hysteretic control 2004 ·2004 IEEE 35th Annual Power Electronics Specialists Conference (IEEE Cat. No.04CH37551) ·G. Schrom, P. Hazucha, Jaehong Hahn, Donald S. Gardner, B. Bloechel, G. Dermer, S. Narendra, Tanay Karnik, Vivek De	82
14	Temperature and process invariant MOS-based reference current generation circuits for sub-1V operation 2003 ·Stephen Tang, S. Narendra, Vivek De	1
15	Efficiency analysis of a high frequency buck converter for on–chip integration with a dual–V DD microprocessor 2002 ·European Solid-State Circuits Conference ·Volkan Kursun, S. Narendra, Vivek De	33
16	Subthreshold leakage modeling and reduction techniques 2002 ·Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·James Kao, S. Narendra, Anantha P. Chandrakasan	188
17	Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage breakdown → 2002 ·IEEE Journal of Solid-State Circuits ·James Tschanz, James Kao, S. Narendra, R. Nair, D.A. Antoniadis, Anantha P. Chandrakasan, Vivek De	548
18	Effective Dielectric Thickness Scaling for High-K Gate Dielectric Mosfets 2002 ·MRS Proceedings ·Krishna K. Bhuwalka, Nihar R. Mohapatra, S. Narendra, V. Ramgopal Rao	4
19	Comparative delay and energy of single edge-triggered & dual edge-triggered pulsed flip-flops for high-performance microprocessors 2001 ·James Tschanz, S. Narendra, Zhanping Chen, Shekhar Borkar, Manoj Sachdev, Vivek De	137
20	The Impact of High-K Gate Dielectrics on Sub 100 nm CMOS Circuit Performance 2001 ·Nihar R. Mohapatra, Madhav P. Desai, S. Narendra, V. Ramgopal Rao	5

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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