Victor Champac

1.1k citations

100 papers · 720 indexed · h-index 14

Impact in

Hardware and Architecture top 2%
- VLSI and Analog Circuit Testing
Electrical and Electronic Engineering top 5%
- Integrated Circuits and Semiconductor Failure Analysis
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Low-power high-performance VLSI design
- Radiation Effects in Electronics
- Ferroelectric and Negative Capacitance Devices
- VLSI and FPGA Design Techniques

Papers in

Hardware and Architecture 59
- VLSI and Analog Circuit Testing 59
Electrical and Electronic Engineering 97
- Integrated Circuits and Semiconductor Failure Analysis 64
- Advancements in Semiconductor Devices and Circuit Design 42
- Semiconductor materials and devices 41
- Low-power high-performance VLSI design 34
- Radiation Effects in Electronics 15
- Electrostatic Discharge in Electronics 6
- VLSI and FPGA Design Techniques 4

Co-authors: Joan Figueras Antonio Rubio J. Segura J.P. Teixeira I.C. Teixeira Marcelino Santos M. Renovell Mónico Linares Aranda
Journals: IEEE Transactions on Very Large Scale Integration (VLSI) Systems (6 papers)Electronics Letters (5 papers)Microelectronics Reliability (5 papers)Journal of Electronic Testing (10 papers)ACM Journal on Emerging Technologies in Computing Systems (1 paper)
Partner nations: Mexico Spain United States

In The Last Decade

Victor Champac

91 papers receiving 701 citations

Peers

Countries citing papers authored by Victor Champac

Since Specialization

Citations

This map shows the geographic impact of Victor Champac's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Victor Champac with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Victor Champac more than expected).

Fields of papers citing papers by Victor Champac

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Victor Champac. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Victor Champac. The network helps show where Victor Champac may publish in the future.

Co-authors

The 25 scholars most cited alongside Victor Champac, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Victor Champac Line = papers co-authored together Victor Champac links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Aggravated NBTI reliability due to hard-to-detect open defects Microelectronics Reliability ·Rex Ying, Nagraj S Belgaonkar, Victor Champac	2024	0
2	Cost-Effective Analytical Models of Resistive Opens Defects in FinFET Technology IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Rex Ying, O. Shcherban, Victor Champac, M. Renovell, F. Azaı̈s, Mariane Comte, J Haradine	2024	0
3	Impact of aging on the SEU immunity of FinFET-based embedded memory systems Microelectronics Reliability ·M. Koulousaris, Tiago R. Balen, Victor Champac, Yus Mochamad Chlolily, Fabian Vargas	2023	1
4	A New Defect Model due to a Dust Particle Affecting the Fingers of FinFET Logic Gates Victor Champac, O. Shcherban, M. Renovell, Aanuoluwapo Feyisayo Adekoya	2023	0
5	A Semi-analytical Model for Interconnect Open Defects in FinFET Logic Cells O. Shcherban, J Haradine, M. Renovell, Victor Champac	2019	1
6	Modeling and Detectability of Full Open Gate Defects in FinFET Technology IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·O. Shcherban, Piper Vornholt, M. Renovell, Victor Champac	2019	10
7	Selection of Critical Paths for Reliable Frequency Scaling under BTI-Aging Considering Workload Uncertainty and Process Variations Effects ACM Transactions on Design Automation of Electronic Systems ·Yu-Seong Kim, Victor Champac	2018	6
8	Early Selection of Critical Paths for Reliable NBTI Aging-Delay Monitoring IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Yu-Seong Kim, Victor Champac	2016	10
9	Analysis of fin height on FinFET SRAM cell hardening Piper Vornholt, J. Segura, S.A. Bota, Victor Champac	2014	4
10	Small-delay defects detection under process variation using Inter-Path Correlation David A. Lauber, B. Stephan, Victor Champac, Alex Orailoğlu	2012	4
11	Computing the Detection Probability for Small Delay Defects of Nanometer ICs Journal of Electronic Testing ·B. Stephan, Victor Champac	2011	4
12	Programmable aging sensor for automotive safety-critical applications Design, Automation, and Test in Europe ·Len Ainsworth, Victor Champac, I.C. Teixeira, Marcelino Santos, J.P. Teixeira	2010	20
13	LATW2010 - 11th Latin-American Test Workshop Piper Vornholt, Victor Champac, Sangameshwari Maitri, J. Segura	2010	2
14	A methodology to compute the statistical fault coverage of small delays due to opens B. Stephan, Victor Champac	2009	1
15	Test of data retention faults in CMOS SRAMs using special DFT circuitries IEE Proceedings - Circuits Devices and Systems ·Victor Champac, Victor Avendaño	2004	5
16	Signal X-Y zoning to detect inter-signal delay violations Electronics Letters ·Muriel Primon de Barros, Victor Champac, Joan Figueras	2002	4
17	Analysis of the floating gate defect in CMOS Victor Champac, Antonio Rubio, Sophie Blitman	2002	7
18	Bit line sensing strategy for testing for dataretention faults in CMOS SRAMs Electronics Letters ·Victor Champac, Victor Avendaño, Hu Jianwei Xie Xin	2000	11
19	6.1 IDDQ Testing of Opens in CMOS SRAMs Victor Champac, Ufuk Akbiyik, Joan Figueras	1998	7
20	Bridging Faults in CMOS: Possibilities of Current Testing European Solid-State Circuits Conference ·Rosa Rodríguez, J. Segura, Victor Champac, Joan Figueras, Bahat Gulistan	1990	3

About Victor Champac

Victor Champac is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Software, Surfaces, Coatings and Films and Statistics, Probability and Uncertainty, having authored 100 papers that have together received 720 indexed citations. Recurring topics across this work include Integrated Circuits and Semiconductor Failure Analysis (64 papers), VLSI and Analog Circuit Testing (59 papers), Advancements in Semiconductor Devices and Circuit Design (42 papers), Semiconductor materials and devices (41 papers), Low-power high-performance VLSI design (34 papers), Radiation Effects in Electronics (15 papers), Electrostatic Discharge in Electronics (6 papers) and VLSI and FPGA Design Techniques (4 papers). The work is most often cited by research in Hardware and Architecture (432 citations), Electrical and Electronic Engineering (704 citations), Architecture (2 citations), Biomedical Engineering (36 citations) and Computational Theory and Mathematics (11 citations). Victor Champac has collaborated with scholars based in Mexico, Spain and United States. Frequent co-authors include Joan Figueras, Antonio Rubio, J. Segura, J.P. Teixeira, I.C. Teixeira, Marcelino Santos, M. Renovell, Mónico Linares Aranda, Roberto dos Reis and J. Semião. Their work appears in journals such as IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Electronics Letters, Microelectronics Reliability, Journal of Electronic Testing and ACM Journal on Emerging Technologies in Computing Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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