T. Noguchi

411 total citations
26 papers, 247 citations indexed

About

T. Noguchi is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials and Hardware and Architecture. According to data from OpenAlex, T. Noguchi has authored 26 papers receiving a total of 247 indexed citations (citations by other indexed papers that have themselves been cited), including 26 papers in Electrical and Electronic Engineering, 3 papers in Electronic, Optical and Magnetic Materials and 2 papers in Hardware and Architecture. Recurrent topics in T. Noguchi's work include Semiconductor materials and devices (21 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and Low-power high-performance VLSI design (6 papers). T. Noguchi is often cited by papers focused on Semiconductor materials and devices (21 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and Low-power high-performance VLSI design (6 papers). T. Noguchi collaborates with scholars based in Japan and United States. T. Noguchi's co-authors include K. Hatanaka, M. Nagamatsu, S. Tanaka, Koji Hirano, Hideaki� Yoshimura, F. Matsuoka, N. Nagashima, Shigeru Yamada, E. Morifuji and Shôichi Matsuda and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Nuclear Science and Symposium on VLSI Technology.

In The Last Decade

T. Noguchi

24 papers receiving 227 citations

Peers

T. Noguchi
L. Sigal United States
Ming-Chien Tsai Taiwan
T. Sakata Japan
S. Bobba United States
J. O'Neill United States
J. Berthold Germany
Gordon Gammie United States
James Burr United States
H. Ichino Japan
N. Aruna Kumari India
L. Sigal United States
T. Noguchi
Citations per year, relative to T. Noguchi T. Noguchi (= 1×) peers L. Sigal

Countries citing papers authored by T. Noguchi

Since Specialization
Citations

This map shows the geographic impact of T. Noguchi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T. Noguchi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T. Noguchi more than expected).

Fields of papers citing papers by T. Noguchi

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T. Noguchi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T. Noguchi. The network helps show where T. Noguchi may publish in the future.

Co-authorship network of co-authors of T. Noguchi

This figure shows the co-authorship network connecting the top 25 collaborators of T. Noguchi. A scholar is included among the top collaborators of T. Noguchi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T. Noguchi. T. Noguchi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Tanaka, Shin‐ichi & T. Noguchi. (2019). A 2.45-GHz Self-Synchronous GaN FET Rectifier Using CRLH-TL-Based Gate Control Circuit. 595–598. 3 indexed citations
2.
Noguchi, T., Khoirul Anwar, Masato Saito, & Minoru Okada. (2008). Efficient PAPR for OFDM and CI/OFDM systems with iterative clipping. 525–528. 2 indexed citations
3.
Fukui, H., Hideaki� Yoshimura, H. Oyamatsu, et al.. (2005). Comprehensive study on layout dependence of soft errors in CMOS latch circuits and its scaling trend for 65 nm technology node and beyond. 40. 222–223. 6 indexed citations
4.
Yoshimura, Hideaki�, Ko‐ichiro Ohno, M. Saito, et al.. (2005). Mobility improvement for 45nm node by combination of optimized stress control and channel orientation design. 217–220. 27 indexed citations
5.
Takegawa, Y., K. Ishimaru, M. Takayanagi, et al.. (2004). 45nm CMOS platform technology (CMOS6) with high density embedded memories. 12–13. 9 indexed citations
6.
Aota, S., Y. Takegawa, K. Isobe, et al.. (2004). Scalability of strained silicon CMOSFET and high drive current enhancement in the 40 nm gate length technology. 3.5.1–3.5.4. 24 indexed citations
7.
Morifuji, E., Takeshi Yoshida, Shôichi Matsuda, et al.. (2004). New guideline of Vdd and Vth scaling for 65nm technology and beyond. 164–165. 12 indexed citations
8.
Yamasaki, H., T. Iinuma, Y. Takegawa, et al.. (2004). High performance CMOSFET technology for 45nm generation. 166–167. 3 indexed citations
9.
Wada, Yoshio, et al.. (2003). Highly reliable process insensitive 3.3 V-5 V interface circuit. 90–91. 1 indexed citations
10.
Noguchi, T., K. Hatanaka, & K. Maeguchi. (2003). A threshold pulse width for electromigration under pulsed stress conditions. 183–189. 2 indexed citations
11.
Morifuji, E., M. Kanda, Shôichi Matsuda, et al.. (2003). High performance 30 nm bulk CMOS for 65 nm technology node (CMOS5). 655–658. 11 indexed citations
12.
13.
Yoshida, Takeshi, H. Takato, T. Sakurai, et al.. (2002). A fabrication method for high performance embedded DRAM of 0.18 μm generation and beyond. 61–64. 1 indexed citations
14.
Nagamatsu, M., et al.. (1990). A 15-ns 32*32-b CMOS multiplier with an improved parallel structure. IEEE Journal of Solid-State Circuits. 25(2). 494–497. 69 indexed citations
15.
Nagamatsu, M., et al.. (1989). A 15 ns 32×32-bit CMOS multiplier with an improved parallel structure. 10.3/1–10.3/4. 18 indexed citations
16.
Hatano, Koji, et al.. (1989). A radiation-hardened 10 K-gate CMOS gate array. IEEE Transactions on Nuclear Science. 36(6). 2435–2438. 9 indexed citations
17.
Hosono, Yasuharu, et al.. (1987). Stability and Reliability Investigation on Fully ECL Compatible High Speed- Logic ICs.. 49–52. 1 indexed citations
18.
Noguchi, T., et al.. (1986). High Speed CMOS Structure with Optimized Gate Work Function. Symposium on VLSI Technology. 19–20. 4 indexed citations
19.
Noguchi, T., et al.. (1986). Parasitic resistance characterization for optimum design of half micron MOSFETs. 730–733. 2 indexed citations
20.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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