S. Cimino

410 total citations
33 papers, 332 citations indexed

About

S. Cimino is a scholar working on Electrical and Electronic Engineering, Mechanics of Materials and Materials Chemistry. According to data from OpenAlex, S. Cimino has authored 33 papers receiving a total of 332 indexed citations (citations by other indexed papers that have themselves been cited), including 33 papers in Electrical and Electronic Engineering, 3 papers in Mechanics of Materials and 2 papers in Materials Chemistry. Recurrent topics in S. Cimino's work include Semiconductor materials and devices (29 papers), Advancements in Semiconductor Devices and Circuit Design (23 papers) and Integrated Circuits and Semiconductor Failure Analysis (17 papers). S. Cimino is often cited by papers focused on Semiconductor materials and devices (29 papers), Advancements in Semiconductor Devices and Circuit Design (23 papers) and Integrated Circuits and Semiconductor Failure Analysis (17 papers). S. Cimino collaborates with scholars based in United States, Italy and Belgium. S. Cimino's co-authors include Andrea Cester, A. Paccagnella, G. Ghidini, L. Pantisano, V. V. Afanas’ev, T. Nigam, A. Kerber, D. J. Wouters, M. Jurczak and F Guarin and has published in prestigious journals such as Applied Physics Letters, IEEE Electron Device Letters and Electronics Letters.

In The Last Decade

S. Cimino

32 papers receiving 325 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
S. Cimino United States 10 323 51 17 16 15 33 332
E. Vecchio Belgium 9 229 0.7× 58 1.1× 3 0.2× 11 0.7× 23 1.5× 16 243
T. Y. Hoffmann Belgium 10 318 1.0× 24 0.5× 11 0.6× 47 2.9× 4 0.3× 32 339
J. Li United States 10 218 0.7× 42 0.8× 13 0.8× 14 0.9× 4 0.3× 29 245
T. Fukai Japan 10 316 1.0× 21 0.4× 29 1.7× 25 1.6× 5 0.3× 22 340
B.-Y. Nguyen France 12 336 1.0× 48 0.9× 4 0.2× 38 2.4× 27 1.8× 25 342
Jyi-Tsong Lin Taiwan 12 500 1.5× 37 0.7× 5 0.3× 22 1.4× 8 0.5× 124 517
Suzanne Lancaster Germany 9 221 0.7× 120 2.4× 9 0.5× 18 1.1× 10 0.7× 36 250
Chenming Hu United States 9 344 1.1× 44 0.9× 4 0.2× 21 1.3× 4 0.3× 19 381
U. Haak Germany 7 126 0.4× 15 0.3× 11 0.6× 29 1.8× 7 0.5× 15 172
G. Le Carval France 11 352 1.1× 50 1.0× 8 0.5× 34 2.1× 15 1.0× 40 372

Countries citing papers authored by S. Cimino

Since Specialization
Citations

This map shows the geographic impact of S. Cimino's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Cimino with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Cimino more than expected).

Fields of papers citing papers by S. Cimino

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Cimino. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Cimino. The network helps show where S. Cimino may publish in the future.

Co-authorship network of co-authors of S. Cimino

This figure shows the co-authorship network connecting the top 25 collaborators of S. Cimino. A scholar is included among the top collaborators of S. Cimino based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S. Cimino. S. Cimino is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
2.
Singh, Jagar, S. Cimino, Jeffrey B. Johnson, et al.. (2021). FinFET LDMOS technology challenges and opportunities for digital TV and 6GHz WiFi PA applications. Symposium on VLSI Technology. 1–2. 4 indexed citations
3.
Razavieh, Ali, et al.. (2020). Extremely-Low Threshold Voltage FinFET for 5G mmWave Applications. IEEE Journal of the Electron Devices Society. 9. 165–169. 9 indexed citations
4.
Razavieh, Ali, et al.. (2020). FinFET with Contact over Active-Gate for 5G Ultra-Wideband Applications. 1–2. 11 indexed citations
5.
Chbili, Z., A. Kerber, S. Cimino, et al.. (2019). Self-Heating Effects on Hot Carrier Degradation and Its Impact on Logic Circuit Reliability. IEEE Transactions on Device and Materials Reliability. 19(2). 249–254. 16 indexed citations
6.
Toledano-Luque, M., T. Nigam, P. Srinivasan, et al.. (2019). Reliability-Aware FinFET Design. 218–221. 1 indexed citations
7.
Gupta, Amit Kumar, M. Toledano-Luque, J. Johnson, et al.. (2019). Hot Carrier Reliability Improvement of Thicker Gate Oxide nFET Devices in Advanced FinFETs. 1–6. 1 indexed citations
8.
Premachandran, C.S., et al.. (2018). Reliability challenges for 2.5D/3D integration: An overview. 5B.4–1. 7 indexed citations
11.
Kerber, A., P. Srinivasan, S. Cimino, et al.. (2017). Device reliability metric for end-of-life performance optimization based on circuit level assessment. 2D–3.1. 25 indexed citations
12.
Kannan, Sukeshwar, C.S. Premachandran, Daniel M. Smith, et al.. (2017). Impact of TSV process on 14nm FEOL and BEOL reliability. 4A–2.1. 6 indexed citations
13.
Premachandran, C.S., Sukeshwar Kannan, Rakesh Ranjan, et al.. (2016). Impact of 3D Via Middle TSV Process on 20nm Wafer Level FEOL and BEOL Reliability. 1593–1598. 6 indexed citations
14.
Pantisano, L., V. V. Afanas’ev, S. Cimino, et al.. (2011). Towards barrier height modulation in HfO2/TiN by oxygen scavenging – Dielectric defects or metal induced gap states?. Microelectronic Engineering. 88(7). 1251–1254. 36 indexed citations
15.
Cimino, S., Andrea Padovani, Luca Larcher, et al.. (2011). A study of the leakage current in TiN/HfO2/TiN capacitors. Microelectronic Engineering. 95. 71–73. 23 indexed citations
16.
Park, Sangsu, Jungho Shin, S. Cimino, et al.. (2011). Feasibility Study of $\hbox{Mo/SiO}_{x}/\hbox{Pt}$ Resistive Random Access Memory in an Inverter Circuit for FPGA Applications. IEEE Electron Device Letters. 32(12). 1665–1667. 4 indexed citations
17.
Cester, Andrea, et al.. (2004). Incidence of oxide and interface degradation on MOSFET performance. Microelectronic Engineering. 72(1-4). 66–70. 3 indexed citations
18.
19.
Cimino, S., Andrea Cester, A. Paccagnella, & G. Ghidini. (2003). Ionising radiation effects on MOSFET drain current. Microelectronics Reliability. 43(8). 1247–1251. 1 indexed citations
20.
Cester, Andrea, S. Cimino, E. Miranda, et al.. (2003). Statistical model for radiation-induced wear-out of ultra-thin gate oxides after exposure to heavy ion irradiation. IEEE Transactions on Nuclear Science. 50(6). 2167–2175. 14 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026