P. Coudrain

1.4k total citations
46 papers, 487 citations indexed

About

P. Coudrain is a scholar working on Electrical and Electronic Engineering, Automotive Engineering and Mechanical Engineering. According to data from OpenAlex, P. Coudrain has authored 46 papers receiving a total of 487 indexed citations (citations by other indexed papers that have themselves been cited), including 40 papers in Electrical and Electronic Engineering, 8 papers in Automotive Engineering and 8 papers in Mechanical Engineering. Recurrent topics in P. Coudrain's work include 3D IC and TSV technologies (34 papers), Electronic Packaging and Soldering Technologies (21 papers) and Semiconductor materials and devices (8 papers). P. Coudrain is often cited by papers focused on 3D IC and TSV technologies (34 papers), Electronic Packaging and Soldering Technologies (21 papers) and Semiconductor materials and devices (8 papers). P. Coudrain collaborates with scholars based in France, Canada and Switzerland. P. Coudrain's co-authors include P. Batude, T. Ernst, Julien Arcamone, P.-E. Gaillardon, L. Di Cioccio, Yann Beilliard, Guillaume Parry, Pascal Vivet, Rafaël Estevez and S. Moreau and has published in prestigious journals such as Energy, Journal of Physics D Applied Physics and IEEE Transactions on Electron Devices.

In The Last Decade

P. Coudrain

45 papers receiving 476 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
P. Coudrain France 12 423 74 69 62 48 46 487
Scott Pozder United States 14 580 1.4× 54 0.7× 51 0.7× 71 1.1× 52 1.1× 25 607
V. Sundaram United States 14 540 1.3× 32 0.4× 88 1.3× 46 0.7× 35 0.7× 60 607
Min-Suk Suh South Korea 9 684 1.6× 66 0.9× 57 0.8× 47 0.8× 47 1.0× 20 709
C. Chappaz France 7 275 0.7× 29 0.4× 43 0.6× 99 1.6× 25 0.5× 17 301
Robert Wieland Germany 12 440 1.0× 38 0.5× 90 1.3× 25 0.4× 30 0.6× 32 483
H. Gan United States 8 583 1.4× 120 1.6× 51 0.7× 199 3.2× 30 0.6× 15 608
M. J. Interrante United States 6 463 1.1× 24 0.3× 71 1.0× 52 0.8× 32 0.7× 7 487
David Ho Singapore 12 583 1.4× 70 0.9× 113 1.6× 94 1.5× 21 0.4× 47 632
C. T. Wang Taiwan 10 338 0.8× 19 0.3× 62 0.9× 37 0.6× 17 0.4× 13 379
Kwang-Yoo Byun South Korea 8 711 1.7× 38 0.5× 84 1.2× 64 1.0× 37 0.8× 18 736

Countries citing papers authored by P. Coudrain

Since Specialization
Citations

This map shows the geographic impact of P. Coudrain's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by P. Coudrain with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites P. Coudrain more than expected).

Fields of papers citing papers by P. Coudrain

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by P. Coudrain. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by P. Coudrain. The network helps show where P. Coudrain may publish in the future.

Co-authorship network of co-authors of P. Coudrain

This figure shows the co-authorship network connecting the top 25 collaborators of P. Coudrain. A scholar is included among the top collaborators of P. Coudrain based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with P. Coudrain. P. Coudrain is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Coudrain, P., et al.. (2022). (Invited) Fan-out Wafer-Level Packaging: Opportunities and Challenges Towards Heterogeneous Systems. ECS Transactions. 109(2). 3–14. 1 indexed citations
2.
Savelli, G., et al.. (2022). High power 2.5D integrated thermoelectric generators combined with microchannels technology. Energy. 252. 123984–123984. 2 indexed citations
3.
Dutoit, Denis, P. Coudrain, Pascal Vivet, et al.. (2020). How 3D integration technologies enable advanced compute node for Exascale-level High Performance Computing?. HAL (Le Centre pour la Communication Scientifique Directe). 52. 15.3.1–15.3.4. 2 indexed citations
4.
Widiez, J., D. Blachier, Paul‐Henri Haumesser, et al.. (2019). Advanced Substrates for GaN-Based Power Devices. SPIRE - Sciences Po Institutional REpository. 168–174. 3 indexed citations
5.
Coudrain, P., et al.. (2018). Add-On Microchannels for Hotspot Thermal Management of Microelectronic Chips in Compact Applications. IEEE Transactions on Components Packaging and Manufacturing Technology. 9(3). 434–445. 7 indexed citations
6.
Widiez, J., et al.. (2018). Solderless Leadframe Assisted Wafer-Level Packaging Technology for Power Electronics. HAL (Le Centre pour la Communication Scientifique Directe). 3. 1251–1257. 1 indexed citations
7.
Coudrain, P., et al.. (2017). Carbon-based patterned heat spreaders for thermal mitigation of wire bonded packages. 1–6. 2 indexed citations
8.
Beilliard, Yann, Rafaël Estevez, Guillaume Parry, et al.. (2016). Thermomechanical finite element modeling of Cu–SiO2 direct hybrid bonding with a dishing effect on Cu surfaces. International Journal of Solids and Structures. 117. 208–220. 33 indexed citations
9.
Coudrain, P., et al.. (2016). Thin micro-cold plate for hot-spot aware chip cooling. HAL (Le Centre pour la Communication Scientifique Directe). 1–8. 1 indexed citations
10.
Fiori, Vincent, A. Farcy, F. de Crécy, et al.. (2014). Thermal Effects of Silicon Thickness in 3-D ICs: Measurements and Simulations. IEEE Transactions on Components Packaging and Manufacturing Technology. 4(8). 1284–1292. 7 indexed citations
11.
Moreau, S., Yann Beilliard, P. Coudrain, et al.. (2014). Mass transport-induced failure in direct copper (Cu) bonding interconnects for 3-D integration. 158. 3E.2.1–3E.2.6. 6 indexed citations
12.
13.
Giry, Alexandre, Yann Lamy, C. Raynaud, et al.. (2013). A monolithic watt-level SOI LDMOS linear power amplifier with through silicon via for 4G cellular applications. 19–21. 5 indexed citations
14.
Rochat, N., et al.. (2013). Photo-dielectric polymers material characterizations for 3D packaging applications. 27–32. 4 indexed citations
15.
Joblot, S., et al.. (2013). Reliability study for large silicon interposers report on board. 383–389. 9 indexed citations
16.
17.
Coudrain, P., A. Jouve, T. Magis, et al.. (2012). Towards efficient and reliable 300mm 3D technology for wide I/O interconnects. 330–335. 11 indexed citations
18.
19.
Coudrain, P., et al.. (2011). A silicon platform with Through-silicon vias for heterogeneous RF 3D modules. 1173–1176. 8 indexed citations
20.
Coudrain, P., Pierre Magnan, P. Batude, et al.. (2009). Investigation of a Sequential Three-Dimensional Process for Back-Illuminated CMOS Image Sensors With Miniaturized Pixels. IEEE Transactions on Electron Devices. 56(11). 2403–2413. 10 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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