Pascal Vivet

3.3k total citations
113 papers, 1.7k citations indexed

About

Pascal Vivet is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Pascal Vivet has authored 113 papers receiving a total of 1.7k indexed citations (citations by other indexed papers that have themselves been cited), including 99 papers in Electrical and Electronic Engineering, 52 papers in Hardware and Architecture and 45 papers in Computer Networks and Communications. Recurrent topics in Pascal Vivet's work include Interconnection Networks and Systems (41 papers), 3D IC and TSV technologies (38 papers) and Low-power high-performance VLSI design (34 papers). Pascal Vivet is often cited by papers focused on Interconnection Networks and Systems (41 papers), 3D IC and TSV technologies (38 papers) and Low-power high-performance VLSI design (34 papers). Pascal Vivet collaborates with scholars based in France, Switzerland and Brazil. Pascal Vivet's co-authors include Yvain Thonnart, Édith Beigné, Fabien Clermidy, F. Clermidy, Marc Renaudin, Eckhard Grass, Miloš Krstić, Frank K. Gürkaynak, Didier Lattard and Alex Yakovlev and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Nature Electronics.

In The Last Decade

Pascal Vivet

107 papers receiving 1.6k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Pascal Vivet France 22 1.3k 836 810 93 77 113 1.7k
Kambiz Samadi United States 21 1.3k 1.0× 791 0.9× 805 1.0× 117 1.3× 85 1.1× 49 1.8k
Édith Beigné France 19 989 0.7× 483 0.6× 417 0.5× 117 1.3× 120 1.6× 108 1.3k
David Fick United States 21 1.4k 1.1× 651 0.8× 678 0.8× 72 0.8× 276 3.6× 31 1.8k
J. Cong United States 26 2.5k 1.8× 1.7k 2.0× 676 0.8× 97 1.0× 63 0.8× 85 2.8k
Igor Loi Italy 22 1.1k 0.8× 645 0.8× 710 0.9× 113 1.2× 129 1.7× 59 1.6k
Meeta S. Gupta United States 18 1.0k 0.8× 892 1.1× 651 0.8× 86 0.9× 71 0.9× 34 1.5k
Samuel Naffziger United States 25 1.8k 1.4× 1.0k 1.2× 511 0.6× 60 0.6× 324 4.2× 55 2.2k
Jason Howard United States 13 1.0k 0.8× 1.2k 1.4× 1.3k 1.6× 48 0.5× 58 0.8× 24 1.8k
Saurabh Dighe United States 10 1.0k 0.8× 1.2k 1.4× 1.2k 1.5× 44 0.5× 54 0.7× 13 1.7k
Vasantha Erraguntla United States 14 831 0.6× 834 1.0× 838 1.0× 64 0.7× 81 1.1× 20 1.3k

Countries citing papers authored by Pascal Vivet

Since Specialization
Citations

This map shows the geographic impact of Pascal Vivet's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Pascal Vivet with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Pascal Vivet more than expected).

Fields of papers citing papers by Pascal Vivet

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Pascal Vivet. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Pascal Vivet. The network helps show where Pascal Vivet may publish in the future.

Co-authorship network of co-authors of Pascal Vivet

This figure shows the co-authorship network connecting the top 25 collaborators of Pascal Vivet. A scholar is included among the top collaborators of Pascal Vivet based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Pascal Vivet. Pascal Vivet is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Thonnart, Yvain, et al.. (2022). Architecting Optically Controlled Phase Change Memory. ACM Transactions on Architecture and Code Optimization. 19(4). 1–26. 17 indexed citations
2.
Thonnart, Yvain, et al.. (2020). PROWAVES: Proactive Runtime Wavelength Selection for Energy-Efficient Photonic NoCs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 40(10). 2156–2169. 15 indexed citations
3.
Thuries, Sébastien, Olivier Billoint, R. Lemaire, et al.. (2020). M3D-ADTCO: Monolithic 3D Architecture, Design and Technology Co-Optimization for High Energy Efficient 3D IC. HAL (Le Centre pour la Communication Scientifique Directe). 1740–1745. 8 indexed citations
4.
Noël, Jean-Philippe, et al.. (2020). Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. HAL (Le Centre pour la Communication Scientifique Directe). 1187–1192. 3 indexed citations
5.
Thonnart, Yvain, et al.. (2020). System-level Evaluation of Chip-Scale Silicon Photonic Networks for Emerging Data-Intensive Applications. HAL (Le Centre pour la Communication Scientifique Directe). 1444–1449. 9 indexed citations
6.
Dutoit, Denis, P. Coudrain, Pascal Vivet, et al.. (2020). How 3D integration technologies enable advanced compute node for Exascale-level High Performance Computing?. HAL (Le Centre pour la Communication Scientifique Directe). 52. 15.3.1–15.3.4. 2 indexed citations
7.
Vivet, Pascal, Yvain Thonnart, R. Lemaire, et al.. (2016). A $4 \times 4 \times 2$ Homogeneous Scalable 3D Network-on-Chip Circuit With 326 MFlit/s 0.66 pJ/b Robust and Fault Tolerant Asynchronous 3D Links. IEEE Journal of Solid-State Circuits. 52(1). 33–49. 25 indexed citations
8.
Weis, Christian, Matthias Jung, Pascal Vivet, et al.. (2015). Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. Design, Automation, and Test in Europe. 495–500. 17 indexed citations
9.
Weis, Christian, Matthias Jung, Pascal Vivet, et al.. (2015). Retention Time Measurements and Modelling of Bit Error Rates of WIDE I/O DRAM in MPSoCs. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015. 495–500. 13 indexed citations
10.
Valentian, Alexandre, et al.. (2014). The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators. 1–9. 16 indexed citations
11.
12.
Yakovlev, Alex, Pascal Vivet, & Marc Renaudin. (2013). Advances in asynchronous logic: from principles to GALS & NoC, recent industry applications, and commercial CAD tools. Design, Automation, and Test in Europe. 1715–1724. 29 indexed citations
13.
Calazans, Ney, et al.. (2013). H2A: A hardened asynchronous network on chip. 1–6.
14.
Vivet, Pascal, et al.. (2013). Fast and accurate power annotated simulation: Application to a many-core architecture. 191–198. 5 indexed citations
15.
Calazans, Ney, et al.. (2012). An accurate single event effect digital design flow for reliable system level design. Design, Automation, and Test in Europe. 224–229. 12 indexed citations
16.
Thonnart, Yvain, Pascal Vivet, & Fabien Clermidy. (2010). A fully-asynchronous low-power framework for GALS NoC integration. Design, Automation, and Test in Europe. 33–38. 60 indexed citations
17.
Salaün, Gwen, Wendelin Serwe, Yvain Thonnart, & Pascal Vivet. (2007). Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip. 73–82. 18 indexed citations
18.
Vivet, Pascal. (2007). Les enfants maltraités.
19.
Vivet, Pascal, et al.. (2000). Violences scolaires : les enfants victimes de violence à l'école.
20.
Bouvier, J., et al.. (2000). A new contactless smartcard IC using an on-chip antenna and an asynchronous micro-controller. SPIRE - Sciences Po Institutional REpository. 97–100. 9 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Breakdown of academic impact, for papers by Kambiz Samadi Breakdown of academic impact, for papers by Édith Beigné Breakdown of academic impact, for papers by David Fick Breakdown of academic impact, for papers by J. Cong Breakdown of academic impact, for papers by Igor Loi Breakdown of academic impact, for papers by Meeta S. Gupta Breakdown of academic impact, for papers by Samuel Naffziger Breakdown of academic impact, for papers by Jason Howard Breakdown of academic impact, for papers by Saurabh Dighe Breakdown of academic impact, for papers by Vasantha Erraguntla
Rankless by CCL
2026