Javier A. Salcedo

829 total citations
70 papers, 669 citations indexed

About

Javier A. Salcedo is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Javier A. Salcedo has authored 70 papers receiving a total of 669 indexed citations (citations by other indexed papers that have themselves been cited), including 68 papers in Electrical and Electronic Engineering, 3 papers in Hardware and Architecture and 3 papers in Biomedical Engineering. Recurrent topics in Javier A. Salcedo's work include Electrostatic Discharge in Electronics (58 papers), Electromagnetic Compatibility and Noise Suppression (37 papers) and Integrated Circuits and Semiconductor Failure Analysis (29 papers). Javier A. Salcedo is often cited by papers focused on Electrostatic Discharge in Electronics (58 papers), Electromagnetic Compatibility and Noise Suppression (37 papers) and Integrated Circuits and Semiconductor Failure Analysis (29 papers). Javier A. Salcedo collaborates with scholars based in United States, Venezuela and Portugal. Javier A. Salcedo's co-authors include Juin J. Liou, Jean-Jacques Hajjar, Yuanzhong Zhou, Srivatsan Parthasarathy, Slavica Malobabic, A. Ortíz-Conde, Zhiwei Liu, Kalpathy B. Sundaram, Meng Miao and Y. Yue and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Electron Device Letters.

In The Last Decade

Javier A. Salcedo

67 papers receiving 636 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Javier A. Salcedo United States 16 646 41 40 24 18 70 669
S. Ramey United States 15 684 1.1× 60 1.5× 44 1.1× 115 4.8× 20 1.1× 50 732
Fu-Chieh Hsu United States 6 1.3k 2.0× 20 0.5× 41 1.0× 38 1.6× 27 1.5× 12 1.3k
H. Ishiuchi Japan 16 594 0.9× 94 2.3× 28 0.7× 54 2.3× 12 0.7× 63 611
D. Moy United States 11 372 0.6× 38 0.9× 47 1.2× 88 3.7× 13 0.7× 31 395
Toshihiro Sekigawa Japan 9 339 0.5× 40 1.0× 39 1.0× 34 1.4× 18 1.0× 48 353
Simon Tam United States 2 1.1k 1.7× 18 0.4× 40 1.0× 33 1.4× 26 1.4× 2 1.1k
M. Matloubian United States 15 740 1.1× 61 1.5× 16 0.4× 42 1.8× 16 0.9× 42 745
Meng Duan United Kingdom 15 430 0.7× 19 0.5× 15 0.4× 19 0.8× 16 0.9× 38 444
Subhadeep Mukhopadhyay India 17 844 1.3× 98 2.4× 46 1.1× 63 2.6× 9 0.5× 38 919
Zixuan Sun China 12 325 0.5× 23 0.6× 21 0.5× 18 0.8× 20 1.1× 50 362

Countries citing papers authored by Javier A. Salcedo

Since Specialization
Citations

This map shows the geographic impact of Javier A. Salcedo's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Javier A. Salcedo with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Javier A. Salcedo more than expected).

Fields of papers citing papers by Javier A. Salcedo

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Javier A. Salcedo. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Javier A. Salcedo. The network helps show where Javier A. Salcedo may publish in the future.

Co-authorship network of co-authors of Javier A. Salcedo

This figure shows the co-authorship network connecting the top 25 collaborators of Javier A. Salcedo. A scholar is included among the top collaborators of Javier A. Salcedo based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Javier A. Salcedo. Javier A. Salcedo is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Salcedo, Javier A., et al.. (2020). Balancing the Trade-off Between Performance and Mis-trigger Immunity in Active Feedback-based High-voltage Tolerant Power Clamps. 2 indexed citations
2.
Sundaram, Kalpathy B., et al.. (2019). Characterization and Modeling of the Transient Safe Operating Area in LDMOS Transistors. 1–5. 5 indexed citations
3.
Miao, Meng, Juin J. Liou, Bo Song, et al.. (2016). Investigation of forward transient characteristics of vertical GaN-on-GaN p-n diodes. 1–2. 1 indexed citations
4.
Cui, Qiang, Juin J. Liou, Jean-Jacques Hajjar, et al.. (2015). On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits. Journal of International Crisis and Risk Communication Research. 7 indexed citations
5.
Salcedo, Javier A., et al.. (2014). In Situ ESD Protection Structure for Variable Operating Voltage Interface Applications in 28-nm CMOS Process. IEEE Transactions on Device and Materials Reliability. 14(4). 1061–1067. 2 indexed citations
6.
Salcedo, Javier A., et al.. (2014). A Novel Product-Level Human Metal Model Characterization Methodology. IEEE Transactions on Device and Materials Reliability. 14(2). 772–774.
7.
Salcedo, Javier A., et al.. (2013). A low leakage poly-gated SCR device for ESD protection in 65nm CMOS process. EL.5.1–EL.5.5. 14 indexed citations
8.
Cui, Qiang, Javier A. Salcedo, Srivatsan Parthasarathy, et al.. (2013). High-Robustness and Low-Capacitance Silicon-Controlled Rectifier for High-Speed I/O ESD Protection. IEEE Electron Device Letters. 34(2). 178–180. 40 indexed citations
9.
Parthasarathy, Srivatsan, Javier A. Salcedo, & Jean-Jacques Hajjar. (2013). A transient triggered bipolar clamp for electrostatic discharge protection in SiGe BiCMOS technologies. 422. 89–92. 2 indexed citations
10.
Zhou, Yuanzhong, Javier A. Salcedo, & Jean-Jacques Hajjar. (2012). Modeling of high voltage devices for ESD event simulation in SPICE. Microelectronics Journal. 43(5). 305–311. 7 indexed citations
11.
Malobabic, Slavica, Javier A. Salcedo, Alan Righter, Jean-Jacques Hajjar, & Juin J. Liou. (2010). A new ESD design methodology for high voltage DMOS applications. Journal of International Crisis and Risk Communication Research. 1–10. 6 indexed citations
12.
Malobabic, Slavica, Javier A. Salcedo, Jean-Jacques Hajjar, & Juin J. Liou. (2010). Analysis of Safe Operating Area of NLDMOS and PLDMOS Transistors Subject to Transient Stresses. IEEE Transactions on Electron Devices. 57(10). 2655–2663. 16 indexed citations
13.
Zhou, Yuanzhong, et al.. (2010). Prediction and Modeling of Thin Gate Oxide Breakdown Subject to Arbitrary Transient Stresses. IEEE Transactions on Electron Devices. 57(9). 2296–2305. 17 indexed citations
14.
Liou, Juin J., et al.. (2009). Transient safe operating area (TSOA) definition for ESD applications. Journal of International Crisis and Risk Communication Research. 1–11. 4 indexed citations
15.
Malobabic, Slavica, et al.. (2008). Gate oxide evaluation under very fast transmission line pulse (VFTLP) CDM-type stress. Journal of International Crisis and Risk Communication Research. 1–8. 11 indexed citations
16.
García-Sánchez, Francisco J., et al.. (2006). Comments on “A sinh Resistor and Its Application to tanh Linearization”. IEEE Journal of Solid-State Circuits. 41(10). 2359–2359. 1 indexed citations
17.
Salcedo, Javier A., et al.. (2005). On the design of tunable high-holding-voltage LVTSCR-based cells for on-chip ESD protection. 2. 798–803. 2 indexed citations
18.
Salcedo, Javier A., et al.. (2005). Design and Integration of Novel SCR-Based Devices for ESD Protection in CMOS/BiCMOS Technologies. IEEE Transactions on Electron Devices. 52(12). 2682–2689. 38 indexed citations
19.
Salcedo, Javier A., et al.. (2004). Novel and Robust Silicon-Controlled Rectifier (SCR) Based Devices for On-Chip ESD Protection. IEEE Electron Device Letters. 25(9). 658–660. 18 indexed citations
20.
Salcedo, Javier A., et al.. (2001). New approach for defining the threshold voltage of MOSFETs. IEEE Transactions on Electron Devices. 48(4). 809–813. 19 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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