Srivatsan Parthasarathy

901 total citations · 1 hit paper
26 papers, 675 citations indexed

About

Srivatsan Parthasarathy is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Condensed Matter Physics. According to data from OpenAlex, Srivatsan Parthasarathy has authored 26 papers receiving a total of 675 indexed citations (citations by other indexed papers that have themselves been cited), including 26 papers in Electrical and Electronic Engineering, 2 papers in Hardware and Architecture and 1 paper in Condensed Matter Physics. Recurrent topics in Srivatsan Parthasarathy's work include Electrostatic Discharge in Electronics (21 papers), Electromagnetic Compatibility and Noise Suppression (14 papers) and Integrated Circuits and Semiconductor Failure Analysis (13 papers). Srivatsan Parthasarathy is often cited by papers focused on Electrostatic Discharge in Electronics (21 papers), Electromagnetic Compatibility and Noise Suppression (14 papers) and Integrated Circuits and Semiconductor Failure Analysis (13 papers). Srivatsan Parthasarathy collaborates with scholars based in United States, France and China. Srivatsan Parthasarathy's co-authors include Scott E. Thompson, Javier A. Salcedo, Yuanzhong Zhou, Jean-Jacques Hajjar, Juin J. Liou, Qiang Cui, J.J. Hajjar, Linfeng He, Kalpathy B. Sundaram and Andrew D. Koehler and has published in prestigious journals such as Applied Physics Letters, Materials Today and IEEE Transactions on Electron Devices.

In The Last Decade

Srivatsan Parthasarathy

26 papers receiving 643 citations

Hit Papers

Moore's law: the future of Si microelectronics 2006 2026 2012 2019 2006 100 200 300 400

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Srivatsan Parthasarathy United States 8 513 194 131 112 51 26 675
D. Misra United States 17 906 1.8× 252 1.3× 114 0.9× 134 1.2× 94 1.8× 132 1.0k
Shamik Das United States 8 395 0.8× 208 1.1× 305 2.3× 119 1.1× 41 0.8× 13 586
Adrian Chasin Belgium 21 1.3k 2.5× 361 1.9× 152 1.2× 111 1.0× 58 1.1× 105 1.3k
Shuhei Yamamoto Japan 10 347 0.7× 98 0.5× 101 0.8× 88 0.8× 34 0.7× 41 484
Jonathan Roberts United Kingdom 9 249 0.5× 228 1.2× 154 1.2× 87 0.8× 69 1.4× 16 498
Jinjuan Xiang China 18 1.2k 2.4× 497 2.6× 182 1.4× 156 1.4× 65 1.3× 116 1.3k
Chang‐Hong Shen Taiwan 19 680 1.3× 415 2.1× 203 1.5× 94 0.8× 63 1.2× 66 935
Laurie E. Calvet France 14 415 0.8× 400 2.1× 225 1.7× 245 2.2× 58 1.1× 41 829
Chao-Ching Cheng Taiwan 17 625 1.2× 547 2.8× 170 1.3× 99 0.9× 63 1.2× 56 863
Sangmoo Choi South Korea 16 805 1.6× 226 1.2× 125 1.0× 77 0.7× 30 0.6× 45 935

Countries citing papers authored by Srivatsan Parthasarathy

Since Specialization
Citations

This map shows the geographic impact of Srivatsan Parthasarathy's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Srivatsan Parthasarathy with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Srivatsan Parthasarathy more than expected).

Fields of papers citing papers by Srivatsan Parthasarathy

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Srivatsan Parthasarathy. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Srivatsan Parthasarathy. The network helps show where Srivatsan Parthasarathy may publish in the future.

Co-authorship network of co-authors of Srivatsan Parthasarathy

This figure shows the co-authorship network connecting the top 25 collaborators of Srivatsan Parthasarathy. A scholar is included among the top collaborators of Srivatsan Parthasarathy based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Srivatsan Parthasarathy. Srivatsan Parthasarathy is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Parthasarathy, Srivatsan, et al.. (2022). Device for Protecting High Frequency and High Data Rate Interface Applications in FinFET Process Technologies. 203–206. 3 indexed citations
2.
He, Linfeng, Javier A. Salcedo, Srivatsan Parthasarathy, Jean-Jacques Hajjar, & Kalpathy B. Sundaram. (2020). A New Low-Capacitance High-Voltage-Tolerant Protection Clamp for High-Speed Applications. IEEE Transactions on Electron Devices. 67(8). 3030–3034. 8 indexed citations
3.
Salcedo, Javier A., et al.. (2020). Balancing the Trade-off Between Performance and Mis-trigger Immunity in Active Feedback-based High-voltage Tolerant Power Clamps. 2 indexed citations
4.
He, Linfeng, Javier A. Salcedo, Srivatsan Parthasarathy, et al.. (2018). Compact and Fast-Response Voltage Clamp for Bi-Directional Signal Swing Interface Applications. IEEE Electron Device Letters. 39(12). 1880–1883. 27 indexed citations
5.
Zhou, Yuanzhong, et al.. (2018). System Level Esd Simulation In Spice: A Holistic Approach. 1–7. 2 indexed citations
6.
Sundaram, Kalpathy B., et al.. (2018). Distributed ESD Protection Network for Millimetre-Wave RF Applications. Journal of International Crisis and Risk Communication Research. 1–5. 2 indexed citations
7.
Parthasarathy, Srivatsan, et al.. (2015). ESD protection clamp with active feedback and mis-trigger immunity in 28nm CMOS process. EL.3.1–EL.3.5. 5 indexed citations
8.
Parthasarathy, Srivatsan, et al.. (2015). Design of ESD protection for large signal swing RF inputs operating to 24GHz in 0.18um SiGe BiCMOS process. 413–416. 2 indexed citations
9.
Cui, Qiang, Juin J. Liou, Jean-Jacques Hajjar, et al.. (2015). On-Chip Electro-Static Discharge (ESD) Protection for Radio-Frequency Integrated Circuits. Journal of International Crisis and Risk Communication Research. 7 indexed citations
10.
Salcedo, Javier A., et al.. (2014). In Situ ESD Protection Structure for Variable Operating Voltage Interface Applications in 28-nm CMOS Process. IEEE Transactions on Device and Materials Reliability. 14(4). 1061–1067. 2 indexed citations
11.
Parthasarathy, Srivatsan, Javier A. Salcedo, & Jean-Jacques Hajjar. (2014). Design of a low leakage ESD clamp for high voltage supply in 65nm CMOS technology. 4C.4.1–4C.4.5. 6 indexed citations
12.
Parthasarathy, Srivatsan, Javier A. Salcedo, & Jean-Jacques Hajjar. (2013). A transient triggered bipolar clamp for electrostatic discharge protection in SiGe BiCMOS technologies. 422. 89–92. 2 indexed citations
13.
Cui, Qiang, Javier A. Salcedo, Srivatsan Parthasarathy, et al.. (2013). High-Robustness and Low-Capacitance Silicon-Controlled Rectifier for High-Speed I/O ESD Protection. IEEE Electron Device Letters. 34(2). 178–180. 40 indexed citations
14.
Cui, Qiang, Srivatsan Parthasarathy, Javier A. Salcedo, et al.. (2013). Design optimization of SiGe BiCMOS Silicon Controlled Rectifier for Charged Device Model (CDM) protection applications. Microelectronics Reliability. 54(1). 57–63. 1 indexed citations
15.
Hajjar, Jean-Jacques, et al.. (2011). CDM event simulation in SPICE: A holistic approach. Electrical Overstress/Electrostatic Discharge Symposium. 1–8. 11 indexed citations
16.
Koehler, Andrew D., Amit Kumar Gupta, Min Chu, et al.. (2010). Extraction of AlGaN/GaN HEMT Gauge Factor in the Presence of Traps. IEEE Electron Device Letters. 31(7). 665–667. 18 indexed citations
17.
Smith, Casey, Srivatsan Parthasarathy, Jason Williams, et al.. (2010). Strain engineering in nanoscale CMOS FinFETs and methods to optimize R<inf>S/D</inf>. 156–157. 4 indexed citations
18.
Adhikari, Hemant, H. R. Harris, Casey Smith, et al.. (2009). High mobility SiGe shell-Si core omega gate pFETS. 136–138. 2 indexed citations
19.
Yang, Xiao-Dong, Srivatsan Parthasarathy, Yongke Sun, et al.. (2008). Temperature dependence of enhanced hole mobility in uniaxial strained p-channel metal-oxide-semiconductor field-effect transistors and insight into the physical mechanisms. Applied Physics Letters. 93(24). 4 indexed citations
20.
Thompson, Scott E. & Srivatsan Parthasarathy. (2006). Moore's law: the future of Si microelectronics. Materials Today. 9(6). 20–25. 482 indexed citations breakdown →

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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