J. Diaz-Fortuny
- Hardware and Architecture top 10%
- VLSI and Analog Circuit Testing 8
-
- Semiconductor materials and devices 33
- Integrated Circuits and Semiconductor Failure Analysis 28
- Advancements in Semiconductor Devices and Circuit Design 28
- Ferroelectric and Negative Capacitance Devices 6
- Electrostatic Discharge in Electronics 5
- Advanced Memory and Neural Computing 5
- Low-power high-performance VLSI design 3
- Co-authors
- M. Nafrı́aJ. Martín-MartínezR. Rodrı́guezE. RocaF.V. FernándezR. Castro‐LópezX. AymerichE. Bury
- Cited by
- Hardware and ArchitectureElectrical and Electronic EngineeringCellular and Molecular Neuroscience
In The Last Decade
J. Diaz-Fortuny
41 papers receiving 311 citations
Peers
Comparison fields: 5 of 32
- Hardware and Architecture 44
- Electrical and Electronic Engineering 293
- Cellular and Molecular Neuroscience 18
- Cardiology and Cardiovascular Medicine 12
- Polymers and Plastics 7
Countries citing papers authored by J. Diaz-Fortuny
This map shows the geographic impact of J. Diaz-Fortuny's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Diaz-Fortuny with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Diaz-Fortuny more than expected).
Fields of papers citing papers by J. Diaz-Fortuny
This network shows the impact of papers produced by J. Diaz-Fortuny. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Diaz-Fortuny. The network helps show where J. Diaz-Fortuny may publish in the future.
Co-authorship network
The 25 scholars most cited alongside J. Diaz-Fortuny, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2024 | 2 | |
| 2 | 2024 | 2 | |
| 3 | 2024 | 3 | |
| 4 | 2024 | 1 | |
| 5 | 2023 | 8 | |
| 6 | 2023 | 5 | |
| 7 | 2023 | 1 | |
| 8 | 2022 | 4 | |
| 9 | 2022 | 4 | |
| 10 | 2019 | 19 | |
| 11 | 2019 | 5 | |
| 12 | 2019 | 13 | |
| 13 | 2018 | 36 | |
| 14 | 2018 | 4 | |
| 15 | 2017 | 2 | |
| 16 | 2017 | 10 | |
| 17 | 2017 | 14 | |
| 18 | 2016 | 2 | |
| 19 | 2015 | 14 | |
| 20 | 2014 | 7 |
About J. Diaz-Fortuny
J. Diaz-Fortuny is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Cellular and Molecular Neuroscience, having authored 45 papers that have together received 315 indexed citations. Recurring topics across this work include Semiconductor materials and devices (33 papers), Integrated Circuits and Semiconductor Failure Analysis (28 papers), Advancements in Semiconductor Devices and Circuit Design (28 papers), VLSI and Analog Circuit Testing (8 papers), Ferroelectric and Negative Capacitance Devices (6 papers), Electrostatic Discharge in Electronics (5 papers), Advanced Memory and Neural Computing (5 papers) and Low-power high-performance VLSI design (3 papers). The work is most often cited by research in Hardware and Architecture (44 citations), Electrical and Electronic Engineering (293 citations) and Cellular and Molecular Neuroscience (18 citations). J. Diaz-Fortuny has collaborated with scholars based in Spain, Belgium and Germany. Frequent co-authors include M. Nafrı́a, J. Martín-Martínez, R. Rodrı́guez, E. Roca, F.V. Fernández, R. Castro‐López, X. Aymerich, E. Bury, B. Kaczer and D. Mateo. Their work appears in journals such as Advanced Functional Materials, IEEE Journal of Solid-State Circuits and Review of Scientific Instruments.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.