Ching-Te Chuang

649 total citations
35 papers, 525 citations indexed

About

Ching-Te Chuang is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, Ching-Te Chuang has authored 35 papers receiving a total of 525 indexed citations (citations by other indexed papers that have themselves been cited), including 34 papers in Electrical and Electronic Engineering, 6 papers in Biomedical Engineering and 5 papers in Hardware and Architecture. Recurrent topics in Ching-Te Chuang's work include Advancements in Semiconductor Devices and Circuit Design (27 papers), Semiconductor materials and devices (23 papers) and Low-power high-performance VLSI design (21 papers). Ching-Te Chuang is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (27 papers), Semiconductor materials and devices (23 papers) and Low-power high-performance VLSI design (21 papers). Ching-Te Chuang collaborates with scholars based in Taiwan and United States. Ching-Te Chuang's co-authors include Ming-Hsien Tu, Shyh‐Jye Jou, Ming-Chien Tsai, Wei-Chiang Shih, Jae‐Joon Kim, Pin Su, Ming-Long Fan, Vita Pi‐Ho Hu, M.M. Pelella and S. Chu and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Electron Device Letters.

In The Last Decade

Ching-Te Chuang

34 papers receiving 498 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Ching-Te Chuang Taiwan 9 510 112 43 14 13 35 525
Rohit Lorenzo India 10 372 0.7× 134 1.2× 38 0.9× 24 1.7× 14 1.1× 49 382
Keejong Kim United States 12 792 1.6× 181 1.6× 115 2.7× 12 0.9× 32 2.5× 18 803
Georg Georgakos Germany 15 626 1.2× 167 1.5× 90 2.1× 15 1.1× 34 2.6× 48 651
Ming-Chien Tsai Taiwan 6 313 0.6× 95 0.8× 31 0.7× 11 0.8× 7 0.5× 11 325
K.N. Quader United States 10 369 0.7× 47 0.4× 20 0.5× 8 0.6× 44 3.4× 20 403
J. Berthold Germany 12 430 0.8× 116 1.0× 88 2.0× 11 0.8× 13 1.0× 32 443
Makoto Yabuuchi Japan 13 739 1.4× 167 1.5× 27 0.6× 7 0.5× 44 3.4× 59 763
Pramod Kolar United States 6 446 0.9× 93 0.8× 37 0.9× 4 0.3× 14 1.1× 7 458
A. Tanabe Japan 12 463 0.9× 63 0.6× 73 1.7× 6 0.4× 34 2.6× 36 476
Louis P. Alarcón Philippines 6 356 0.7× 110 1.0× 113 2.6× 22 1.6× 39 3.0× 39 380

Countries citing papers authored by Ching-Te Chuang

Since Specialization
Citations

This map shows the geographic impact of Ching-Te Chuang's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ching-Te Chuang with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ching-Te Chuang more than expected).

Fields of papers citing papers by Ching-Te Chuang

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ching-Te Chuang. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ching-Te Chuang. The network helps show where Ching-Te Chuang may publish in the future.

Co-authorship network of co-authors of Ching-Te Chuang

This figure shows the co-authorship network connecting the top 25 collaborators of Ching-Te Chuang. A scholar is included among the top collaborators of Ching-Te Chuang based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ching-Te Chuang. Ching-Te Chuang is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Yu, Chang-Hung, Pin Su, & Ching-Te Chuang. (2016). Impact of Random Variations on Cell Stability and Write-Ability of Low-Voltage SRAMs Using Monolayer and Bilayer Transition Metal Dichalcogenide (TMD) MOSFETs. IEEE Electron Device Letters. 37(7). 928–931. 10 indexed citations
2.
Chuang, Ching-Te, et al.. (2016). A 0.35 V, 375 kHz, 5.43 µW, 40 nm, 128 kb, symmetrical 10T subthreshold SRAM with tri-state bit-line. Microelectronics Journal. 51. 89–98. 6 indexed citations
3.
4.
Chuang, Ching-Te, et al.. (2014). A 0.325 V, 600-kHz, 40-nm 72-kb 9T Subthreshold SRAM with Aligned Boosted Write Wordline and Negative Write Bitline Write-Assist. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 23(5). 958–962. 29 indexed citations
5.
Huang, Po-Tsang, Kuan‐Neng Chen, Jin‐Chern Chiou, et al.. (2014). Energy-efficient low-noise 16-channel analog-front-end circuit for bio-potential acquisition. 1–4. 8 indexed citations
6.
7.
8.
Tu, Ming-Hsien, et al.. (2012). A Single-Ended Disturb-Free 9T Subthreshold SRAM With Cross-Point Data-Aware Write Word-Line Structure, Negative Bit-Line, and Adaptive Read Operation Timing Tracing. IEEE Journal of Solid-State Circuits. 47(6). 1469–1482. 147 indexed citations
9.
10.
Fan, Ming-Long, et al.. (2011). Comparison of 4T and 6T FinFET SRAM Cells for Subthreshold Operation Considering Variability—A Model-Based Approach. IEEE Transactions on Electron Devices. 58(3). 609–616. 30 indexed citations
11.
Bansal, Aditya, Rahul Rao, Jae‐Joon Kim, et al.. (2009). Impact of NBTI and PBTI in SRAM bit-cells: Relative sensitivities and guidelines for application-specific target stability/performance. 745–749. 28 indexed citations
12.
Mojumder, Niladri Narayan, Saibal Mukhopadhyay, Jae‐Joon Kim, Ching-Te Chuang, & Kaushik Roy. (2009). Self-Repairing SRAM Using On-Chip Detection and Compensation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18(1). 75–84. 6 indexed citations
13.
Bansal, Aditya, Rouwaida Kanj, Saibal Mukhopadhyay, et al.. (2009). Yield estimation of SRAM circuits using "Virtual SRAM Fab". 631–636. 6 indexed citations
14.
Deng, Jie, Keunwoo Kim, Ching-Te Chuang, & H.‐S. Philip Wong. (2007). Device Footprint Scaling for Ultra Thin Body Fully Depleted SOI. 291. 145–152. 2 indexed citations
15.
Lo, Shih-Hsien, et al.. (2006). Power-Gating Schemes for Ultra-Thin SOI (UTSOI) Circuits in Hybrid SOI-Epitaxial CMOS Structures. 30. 1–2. 1 indexed citations
16.
Mukhopadhyay, Subhas Chandra, Keunwoo Kim, Jae‐Joon Kim, et al.. (2005). Modeling and Analysis of Gate Leakage in Ultra-thin Oxide Sub-50nm Double Gate Devices and Circuits. 410–415. 5 indexed citations
17.
Murthy, Jayathi Y., et al.. (2004). Simulation of Nano-Scale Multi-Fingered PD/SOI MOSFETs Using the Boltzmann Transport Equation. 387–398. 2 indexed citations
18.
Kim, Jae‐Joon, et al.. (2003). SOI-optimized 64-bit high-speed CMOS adder design. 122–125. 5 indexed citations
19.
Chuang, Ching-Te, S.K.H. Fung, F. Assaderaghi, et al.. (2003). PD/SOI SRAM performance in presence of gate-to-body tunneling current. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 11(6). 1106–1113. 1 indexed citations
20.
Lu, Pong-Fei, Ching-Te Chuang, L. Wagner, et al.. (1997). Floating-body effects in partially depleted SOI CMOS circuits. IEEE Journal of Solid-State Circuits. 32(8). 1241–1253. 58 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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