Sylvain Clerc

822 total citations
43 papers, 545 citations indexed

About

Sylvain Clerc is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Sylvain Clerc has authored 43 papers receiving a total of 545 indexed citations (citations by other indexed papers that have themselves been cited), including 40 papers in Electrical and Electronic Engineering, 12 papers in Hardware and Architecture and 9 papers in Biomedical Engineering. Recurrent topics in Sylvain Clerc's work include Low-power high-performance VLSI design (25 papers), Advancements in Semiconductor Devices and Circuit Design (19 papers) and Radiation Effects in Electronics (15 papers). Sylvain Clerc is often cited by papers focused on Low-power high-performance VLSI design (25 papers), Advancements in Semiconductor Devices and Circuit Design (19 papers) and Radiation Effects in Electronics (15 papers). Sylvain Clerc collaborates with scholars based in France, Switzerland and Netherlands. Sylvain Clerc's co-authors include Philippe Roché, Gilles Gasiot, Fady Abouzeid, Maximilien Glorieux, Jean‐Luc Autran, F. Arnaud, Jean-Marc Daveau, Sławosz Uznański, T. Skotnicki and F. Bœuf and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Nuclear Science.

In The Last Decade

Sylvain Clerc

41 papers receiving 524 citations

Peers

Countries citing papers authored by Sylvain Clerc

Since Specialization

Citations

This map shows the geographic impact of Sylvain Clerc's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Sylvain Clerc with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Sylvain Clerc more than expected).

Fields of papers citing papers by Sylvain Clerc

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Sylvain Clerc. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Sylvain Clerc. The network helps show where Sylvain Clerc may publish in the future.

Co-authorship network of co-authors of Sylvain Clerc

This figure shows the co-authorship network connecting the top 25 collaborators of Sylvain Clerc. A scholar is included among the top collaborators of Sylvain Clerc based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Sylvain Clerc. Sylvain Clerc is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of concept 2023 ·SPIRE - Sciences Po Institutional REpository ·(unknown), (unknown), Sylvain Clerc, Andreia Cathelin, Antoine Frappé	0
2	Impact of Aging Degradation on Heavy-Ion SEU Response of 28-nm UTBB FD-SOI Technology 2022 ·IEEE Transactions on Nuclear Science ·(unknown), (unknown), (unknown), (unknown), V. Pouget, Andreia Cathelin, Sylvain Clerc, Paul Leroux	3
3	A 3.0μW@5fps QQVGA Self-Controlled Wake-Up Imager with On-Chip Motion Detection, Auto-Exposure and Object Recognition 2020 ·SPIRE - Sciences Po Institutional REpository ·(unknown), (unknown), Nicolas Royer, (unknown), Sébastien Martin, (unknown), (unknown), (unknown), (unknown), Sylvain Clerc, (unknown)	3
4	A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOI 2020 ·(unknown), Edwige Bano, Andreia Cathelin, Sylvain Clerc	4
5	A 225 μm ${}^{2}$ Probe Single-Point Calibration Digital Temperature Sensor Using Body-Bias Adjustment in 28 nm FD-SOI CMOS 2018 ·IEEE Solid-State Circuits Letters ·(unknown), Ben Keller, Sylvain Clerc, Fady Abouzeid, Andreia Cathelin, Jean‐Luc Autran, Philippe Roché, Borivoje Nikolić	32
6	Enhanced design performance thanks to adaptative body biasing technique in FDSOI technolologies 2017 ·F. Arnaud, Sylvain Clerc, S. Haendler, (unknown), Philippe Flatresse, V. Huard, T. Poiroux	10
7	A 0.40pJ/cycle 981 μm² voltage scalable digital frequency generator for SoC clocking 2017 ·(unknown), Sylvain Clerc, (unknown), Fady Abouzeid, Philippe Roché, Jean‐Luc Autran	1
8	On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC 2016 ·(unknown), Alberto Puggelli, Ben Keller, Brian Zimmer, Milovan Blagojević, Sylvain Clerc, Philippe Roché, Jean‐Luc Autran, Borivoje Nikolić	2
9	30% static power improvement on ARM Cortex^®-A53 using static biasing-anticipation 2016 ·Fady Abouzeid, (unknown), Sylvain Clerc, Jean-Marc Daveau, Gilles Gasiot, D. Noblet, (unknown), Philippe Roché	3
10	28nm FD-SOI technology and design platform for sub-10pJ/cycle and SER-immune 32bits processors 2015 ·Fady Abouzeid, Sylvain Clerc, (unknown), (unknown), Jean-Marc Daveau, Damien Croain, Gilles Gasiot, (unknown), Philippe Roché	8
11	8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing 2015 ·Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) ·Sylvain Clerc, Mehdi Saligane, Fady Abouzeid, (unknown), Jean-Marc Daveau, (unknown), David Bol, (unknown), (unknown), (unknown), (unknown), Damien Croain, (unknown), (unknown), Philippe Roché, Dennis Sylvester	39
12	Experimental model of adaptive body biasing for energy efficiency in 28nm UTBB FD-SOI 2014 ·(unknown), (unknown), Mehdi Saligane, Sylvain Clerc, Philippe Roché, Jean‐Luc Autran, Dennis Sylvester	3
13	New D-Flip-Flop Design in 65 nm CMOS for Improved SEU and Low Power Overhead at System Level 2013 ·IEEE Transactions on Nuclear Science ·Maximilien Glorieux, Sylvain Clerc, Gilles Gasiot, Jean‐Luc Autran, Philippe Roché	23
14	Experimental Soft Error Rate of Several Flip-Flop Designs Representative of Production Chip in 32 nm CMOS Technology 2013 ·IEEE Transactions on Nuclear Science ·Gilles Gasiot, Maximilien Glorieux, Sylvain Clerc, (unknown), Fady Abouzeid, Philippe Roché	10
15	A 0.32V, 55fJ per bit access energy, CMOS 65nm bit-interleaved SRAM with radiation Soft Error tolerance 2012 ·Sylvain Clerc, Fady Abouzeid, Gilles Gasiot, David Gauthier, (unknown), Philippe Roché	6
16	A 65nm SRAM achieving 250mV retention and 350mV, 1MHz, 55fJ/bit access energy, with bit-interleaved radiation Soft Error tolerance 2012 ·Sylvain Clerc, Fady Abouzeid, Gilles Gasiot, David Gauthier, Philippe Roché	10
17	28nm CMOS, energy efficient and variability tolerant, 350mV-to-1.0V, 10MHz/700MHz, 252bits frame error-decoder 2012 ·Fady Abouzeid, Sylvain Clerc, (unknown), (unknown), Philippe Roché	16
18	A 240mV 1MHz, 340mV 10MHz, 40nm CMOS, 252 bits frame decoder using ultra-low voltage circuit design platform 2011 ·Sylvain Clerc, Fady Abouzeid, (unknown), Abhay Kumar, Rajesh Kumar, Philippe Roché	3
19	A 45nm single power supply SRAM supporting low voltage operation down to 0.6V 2008 ·(unknown), (unknown), Sylvain Clerc	5
20	High flexibility CMOS SRAM generator using multiplan architecture 2003 ·Sylvain Clerc, (unknown), (unknown)	1

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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