Ben Keller

1.4k total citations
28 papers, 941 citations indexed

About

Ben Keller is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Vision and Pattern Recognition. According to data from OpenAlex, Ben Keller has authored 28 papers receiving a total of 941 indexed citations (citations by other indexed papers that have themselves been cited), including 25 papers in Electrical and Electronic Engineering, 13 papers in Hardware and Architecture and 8 papers in Computer Vision and Pattern Recognition. Recurrent topics in Ben Keller's work include Low-power high-performance VLSI design (15 papers), Parallel Computing and Optimization Techniques (8 papers) and Advanced Neural Network Applications (8 papers). Ben Keller is often cited by papers focused on Low-power high-performance VLSI design (15 papers), Parallel Computing and Optimization Techniques (8 papers) and Advanced Neural Network Applications (8 papers). Ben Keller collaborates with scholars based in United States, France and United Kingdom. Ben Keller's co-authors include Brucek Khailany, Brian Zimmer, William J. Dally, Rangharajan Venkatesan, Matthew Fojtik, Yanqing Zhang, Alicia Klinefelter, Stephen G. Tell, C. Thomas Gray and Nathaniel Pinckney and has published in prestigious journals such as Communications of the ACM, IEEE Journal of Solid-State Circuits and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Ben Keller

27 papers receiving 915 citations

Peers

Countries citing papers authored by Ben Keller

Since Specialization

Citations

This map shows the geographic impact of Ben Keller's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ben Keller with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ben Keller more than expected).

Fields of papers citing papers by Ben Keller

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ben Keller. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ben Keller. The network helps show where Ben Keller may publish in the future.

Co-authorship network of co-authors of Ben Keller

This figure shows the co-authorship network connecting the top 25 collaborators of Ben Keller. A scholar is included among the top collaborators of Ben Keller based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ben Keller. Ben Keller is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm 2023 ·IEEE Journal of Solid-State Circuits ·Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany	30
2	A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm 2022 ·2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ·Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, William J. Dally, C. Thomas Gray, Brucek Khailany	27
3	XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine Learning 2022 ·Vidya A. Chhabria, Ben Keller, Yanqing Zhang, (unknown), (unknown), Haoxing Ren, Brucek Khailany	1
4	Simba 2021 ·Communications of the ACM ·Yakun Sophia Shao, (unknown), Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler	11
5	Programmable Fine-Grained Power Management and System Analysis of RISC-V Vector Processors in 28-nm FD-SOI 2020 ·IEEE Solid-State Circuits Letters ·Colin Schmidt, Alon Amid, John Wright, Ben Keller, Howard Mao, (unknown), (unknown), Jerry Zhao, Albert Ou, Krste Asanović, Borivoje Nikolić	2
6	Problem C 2020 ·Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany	5
7	A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI 2020 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·John Wright, Colin Schmidt, Ben Keller, (unknown), (unknown), (unknown), Nandish Mehta, Pi-Feng Chiu, (unknown), Krste Asanović, Borivoje Nikolić	8
8	A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm 2020 ·IEEE Journal of Solid-State Circuits ·Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany	82
9	Accelerating Chip Design With Machine Learning 2020 ·IEEE Micro ·Brucek Khailany, Haoxing Ren, Steve Dai, (unknown), Ben Keller, Robert M. Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William J. Dally	36
10	A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm 2019 ·Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany	40
11	A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology 2019 ·Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany	10
12	MAGNet: A Modular Accelerator Generator for Neural Networks 2019 ·Rangharajan Venkatesan, Yakun Sophia Shao, (unknown), Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel Emer, Stephen W. Keckler, Brucek Khailany	84
13	Simba 2019 ·Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler	248
14	A 225 μm ${}^{2}$ Probe Single-Point Calibration Digital Temperature Sensor Using Body-Bias Adjustment in 28 nm FD-SOI CMOS 2018 ·IEEE Solid-State Circuits Letters ·(unknown), Ben Keller, Sylvain Clerc, Fady Abouzeid, Andreia Cathelin, Jean‐Luc Autran, Philippe Roché, Borivoje Nikolić	32
15	A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC–DC Converters in 28 nm FDSOI 2016 ·IEEE Journal of Solid-State Circuits ·Brian Zimmer, Yunsup Lee, Alberto Puggelli, (unknown), Ruzica Jevtić, Ben Keller, (unknown), Milovan Blagojević, Pi-Feng Chiu, Hanh‐Phuc Le, Po-Hung Chen, (unknown), Rimas Avižienis, Andrew Waterman, Brian Richards, Philippe Flatresse, Elad Alon, Krste Asanović, Borivoje Nikolić	51
16	On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC 2016 ·(unknown), Alberto Puggelli, Ben Keller, Brian Zimmer, Milovan Blagojević, Sylvain Clerc, Philippe Roché, Jean‐Luc Autran, Borivoje Nikolić	2
17	An Agile Approach to Building RISC-V Microprocessors 2016 ·IEEE Micro ·Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, (unknown), Ruzica Jevtić, (unknown), Milovan Blagojević, Pi-Feng Chiu, Rimas Avižienis, Brian Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Borivoje Nikolić, Krste Asanović	70
18	A fast, flexible, positive and negative adaptive body-bias generator in 28nm FDSOI 2016 ·Milovan Blagojević, (unknown), Ben Keller, Philippe Flatresse, Andrei Vladimirescu, Borivoje Nikolić	35
19	A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI 2015 ·Brian Zimmer, Yunsup Lee, Alberto Puggelli, (unknown), Ruzica Jevtić, Ben Keller, (unknown), Milovan Blagojević, Pi-Feng Chiu, Hanh‐Phuc Le, Po-Hung Chen, (unknown), Rimas Avižienis, Andrew Waterman, Brian Richards, Philippe Flatresse, Elad Alon, Krste Asanović, Borivoje Nikolić	25
20	A Pausible Bisynchronous FIFO for GALS Systems 2015 ·Ben Keller, Matthew Fojtik, Brucek Khailany	18

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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