Brian Zimmer

1.8k total citations
49 papers, 1.2k citations indexed

About

Brian Zimmer is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Vision and Pattern Recognition. According to data from OpenAlex, Brian Zimmer has authored 49 papers receiving a total of 1.2k indexed citations (citations by other indexed papers that have themselves been cited), including 45 papers in Electrical and Electronic Engineering, 20 papers in Hardware and Architecture and 8 papers in Computer Vision and Pattern Recognition. Recurrent topics in Brian Zimmer's work include Low-power high-performance VLSI design (19 papers), Parallel Computing and Optimization Techniques (12 papers) and Advanced Memory and Neural Computing (8 papers). Brian Zimmer is often cited by papers focused on Low-power high-performance VLSI design (19 papers), Parallel Computing and Optimization Techniques (12 papers) and Advanced Memory and Neural Computing (8 papers). Brian Zimmer collaborates with scholars based in United States, France and United Kingdom. Brian Zimmer's co-authors include William J. Dally, C. Thomas Gray, Stephen G. Tell, Ben Keller, Brucek Khailany, Rangharajan Venkatesan, Matthew Fojtik, Nathaniel Pinckney, Stephen W. Keckler and Alicia Klinefelter and has published in prestigious journals such as Communications of the ACM, IEEE Journal of Solid-State Circuits and IEEE Transactions on Computers.

In The Last Decade

Brian Zimmer

46 papers receiving 1.1k citations

Peers

Countries citing papers authored by Brian Zimmer

Since Specialization

Citations

This map shows the geographic impact of Brian Zimmer's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Brian Zimmer with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Brian Zimmer more than expected).

Fields of papers citing papers by Brian Zimmer

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Brian Zimmer. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Brian Zimmer. The network helps show where Brian Zimmer may publish in the future.

Co-authorship network of co-authors of Brian Zimmer

This figure shows the co-authorship network connecting the top 25 collaborators of Brian Zimmer. A scholar is included among the top collaborators of Brian Zimmer based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Brian Zimmer. Brian Zimmer is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	17.6 A 100MHz Self-Calibrating RC Oscillator Capable of Clock-Glitch Detection for Hardware Security in a 3nm FinFET Process 2025 ·Nandish Mehta, Stephen G. Tell, (unknown), Sudhir S. Kudva, Brian Zimmer, Mahmut E. Sinangil, C. Thomas Gray	0
2	A 77 fJ/Bit 8 Gbps Low-Latency Self-Timed Die-to-Die Link for 2.5D and 3D Interconnect in 3nm 2025 ·Brian Zimmer, Stephen G. Tell, C. Thomas Gray	0
3	A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm 2023 ·IEEE Journal of Solid-State Circuits ·Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany	30
4	A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS 2023 ·IEEE Journal of Solid-State Circuits ·(unknown), John W. Poulton, Walker J. Turner, (unknown), (unknown), Brian Zimmer, Stephen G. Tell, Nikola Nedovic, John Wilson, William J. Dally, C. Thomas Gray	6
5	A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm 2022 ·2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) ·Ben Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, William J. Dally, C. Thomas Gray, Brucek Khailany	27
6	A 2-to-20 GHz Multi-Phase Clock Generator with Phase Interpolators Using Injection-Locked Oscillation Buffers for High-Speed IOs in 16nm FinFET 2019 ·(unknown), John W. Poulton, Xi Chen, Brian Zimmer, Stephen G. Tell, Walker J. Turner, Sudhir S. Kudva, Nikola Nedovic, John Wilson, C. Thomas Gray, William J. Dally	7
7	Voltage-Follower Coupling Quadrature Oscillator with Embedded Phase-Interpolator in 16nm FinFET 2019 ·Xi Chen, (unknown), John W. Poulton, Nikola Nedovic, Brian Zimmer, Stephen G. Tell, C. Thomas Gray	0
8	A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm 2019 ·Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany	40
9	A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology 2019 ·Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany	10
10	A 1.17pJ/b 25Gb/s/pin ground-referenced single-ended serial link for off- and on-package communication in 16nm CMOS using a process- and temperature-adaptive voltage regulator 2018 ·John Wilson, Walker J. Turner, John W. Poulton, Brian Zimmer, Xi Chen, Sudhir S. Kudva, (unknown), Stephen G. Tell, Nikola Nedovic, (unknown), Sunil Sudhakaran, C. Thomas Gray, William J. Dally	34
11	SwapCodes: Error Codes for Hardware-Software Cooperative GPU Pipeline Error Detection 2018 ·Michael B. Sullivan, Siva Kumar Sastry Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler	17
12	A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC–DC Converters in 28 nm FDSOI 2016 ·IEEE Journal of Solid-State Circuits ·Brian Zimmer, Yunsup Lee, Alberto Puggelli, (unknown), Ruzica Jevtić, Ben Keller, (unknown), Milovan Blagojević, Pi-Feng Chiu, Hanh‐Phuc Le, Po-Hung Chen, (unknown), Rimas Avižienis, Andrew Waterman, Brian Richards, Philippe Flatresse, Elad Alon, Krste Asanović, Borivoje Nikolić	51
13	On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC 2016 ·(unknown), Alberto Puggelli, Ben Keller, Brian Zimmer, Milovan Blagojević, Sylvain Clerc, Philippe Roché, Jean‐Luc Autran, Borivoje Nikolić	2
14	Reprogrammable redundancy for cache V<inf>min</inf> reduction in a 28nm RISC-V processor 2016 ·Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolić, Krste Asanović	2
15	An Agile Approach to Building RISC-V Microprocessors 2016 ·IEEE Micro ·Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, (unknown), Ruzica Jevtić, (unknown), Milovan Blagojević, Pi-Feng Chiu, Rimas Avižienis, Brian Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Borivoje Nikolić, Krste Asanović	70
16	A double-tail sense amplifier for low-voltage SRAM in 28nm technology 2016 ·Pi-Feng Chiu, Brian Zimmer, Borivoje Nikolić	10
17	A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI 2015 ·Brian Zimmer, Yunsup Lee, Alberto Puggelli, (unknown), Ruzica Jevtić, Ben Keller, (unknown), Milovan Blagojević, Pi-Feng Chiu, Hanh‐Phuc Le, Po-Hung Chen, (unknown), Rimas Avižienis, Andrew Waterman, Brian Richards, Philippe Flatresse, Elad Alon, Krste Asanović, Borivoje Nikolić	25
18	A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation 2015 ·IEEE Journal of Solid-State Circuits ·Mahmut E. Sinangil, John W. Poulton, Matthew Fojtik, Thomas H. Greer, Stephen G. Tell, (unknown), (unknown), (unknown), Brian Zimmer, William J. Dally, C. Thomas Gray	30
19	Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM 2014 ·Brian Zimmer, Olivier Thomas, (unknown), (unknown), Krste Asanović, Borivoje Nikolić	5
20	6T SRAM design for wide voltage range in 28nm FDSOI 2012 ·Olivier Thomas, Brian Zimmer, (unknown), N. Planes, (unknown), L. Ciampolini, Philippe Flatresse, Borivoje Nikolić	15

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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