R. Nair
- Electrical and Electronic Engineering top 5%
- Hardware and Architecture top 1%
- Computer Networks and Communications top 5%
- Biomedical Engineering
- Artificial Intelligence
- Co-authors
- S. NarendraVivek DeJames TschanzD.A. AntoniadisJames KaoAnantha P. ChandrakasanP.S. HaugeC.L. Berman
- Topics
- VLSI and FPGA Design Techniques (7 papers)Low-power high-performance VLSI design (7 papers)Parallel Computing and Optimization Techniques (6 papers)
- Cited by
- Hardware and ArchitectureElectrical and Electronic EngineeringComputer Networks and Communications
- Partner nations
- United StatesUnited KingdomCanada
In The Last Decade
R. Nair
18 papers receiving 1.0k citations
Hit Papers
Peers
Comparison fields: 5 of 45
- Electrical and Electronic Engineering 947
- Hardware and Architecture 577
- Computer Networks and Communications 195
- Biomedical Engineering 131
- Artificial Intelligence 42
Countries citing papers authored by R. Nair
This map shows the geographic impact of R. Nair's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by R. Nair with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites R. Nair more than expected).
Fields of papers citing papers by R. Nair
This network shows the impact of papers produced by R. Nair. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by R. Nair. The network helps show where R. Nair may publish in the future.
Co-authorship network of co-authors of R. Nair
This figure shows the co-authorship network connecting the top 25 collaborators of R. Nair. A scholar is included among the top collaborators of R. Nair based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with R. Nair. R. Nair is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 2 | |
| 2 | 7 | |
| 3 | 22 | |
| 4 | 12 | |
| 5 | 5 | |
| 6 | 97 | |
| 7 | Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakagebreakdown → | 548 |
| 8 | 13 | |
| 9 | 2 | |
| 10 | 1 | |
| 11 | 14 | |
| 12 | 16 | |
| 13 | 61 | |
| 14 | 147 | |
| 15 | 3 | |
| 16 | 90 | |
| 17 | 27 | |
| 18 | 8 |
About R. Nair
R. Nair is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering, having authored 18 papers that have together received 1.1k indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (7 papers), Low-power high-performance VLSI design (7 papers) and Parallel Computing and Optimization Techniques (6 papers). The work is most often cited by research in Hardware and Architecture (577 citations), Electrical and Electronic Engineering (947 citations) and Computer Networks and Communications (195 citations). R. Nair has collaborated with scholars based in United States, United Kingdom and Canada. Frequent co-authors include S. Narendra, Vivek De, James Tschanz, D.A. Antoniadis, James Kao, Anantha P. Chandrakasan, P.S. Hauge, C.L. Berman, Ellen J. Yoffa and Jim Tschanz. Their work appears in journals such as Proceedings of the IEEE, IEEE Journal of Solid-State Circuits and IEEE Transactions on Computers.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.