Manoj Sachdev

11.2k total citations
360 papers, 8.1k citations indexed

About

Manoj Sachdev is a scholar working on Electrical and Electronic Engineering, Control and Systems Engineering and Hardware and Architecture. According to data from OpenAlex, Manoj Sachdev has authored 360 papers receiving a total of 8.1k indexed citations (citations by other indexed papers that have themselves been cited), including 327 papers in Electrical and Electronic Engineering, 108 papers in Control and Systems Engineering and 91 papers in Hardware and Architecture. Recurrent topics in Manoj Sachdev's work include Power Systems Fault Detection (96 papers), Advancements in Semiconductor Devices and Circuit Design (92 papers) and Low-power high-performance VLSI design (92 papers). Manoj Sachdev is often cited by papers focused on Power Systems Fault Detection (96 papers), Advancements in Semiconductor Devices and Circuit Design (92 papers) and Low-power high-performance VLSI design (92 papers). Manoj Sachdev collaborates with scholars based in Canada, United States and Netherlands. Manoj Sachdev's co-authors include T.S. Sidhu, M. Giray, Mohammad Maymandi‐Nejad, A. Vassighi, H.C. Wood, O. Semenov, Shah M. Jahinuzzaman, David J. Rennie, Bhargab Chattopadhyay and Mohammad Sharifkhani and has published in prestigious journals such as ACS Nano, Applied Physics Letters and IEEE Transactions on Power Systems.

In The Last Decade

Manoj Sachdev

336 papers receiving 7.6k citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
Manoj Sachdev 7.4k 3.2k 1.5k 817 447 360 8.1k
H. Alan Mantooth 6.0k 0.8× 973 0.3× 171 0.1× 189 0.2× 193 0.4× 406 6.6k
E.S. Kuh 4.2k 0.6× 457 0.1× 1.9k 1.2× 247 0.3× 999 2.2× 164 5.2k
R.A. Rohrer 3.0k 0.4× 355 0.1× 831 0.5× 376 0.5× 166 0.4× 90 3.6k
Vishwani D. Agrawal 6.5k 0.9× 624 0.2× 6.3k 4.2× 189 0.2× 304 0.7× 375 7.4k
Sachin S. Sapatnekar 9.6k 1.3× 162 0.0× 4.2k 2.8× 566 0.7× 1.6k 3.5× 483 10.8k
Patrick Girard 4.3k 0.6× 311 0.1× 3.2k 2.1× 233 0.3× 203 0.5× 421 4.9k
Larry Pileggi 2.0k 0.3× 145 0.0× 1.0k 0.7× 229 0.3× 338 0.8× 151 2.5k
Feng Liang 1.8k 0.2× 916 0.3× 210 0.1× 270 0.3× 294 0.7× 147 2.9k
Jean Mahseredjian 5.0k 0.7× 3.5k 1.1× 45 0.0× 145 0.2× 57 0.1× 299 5.6k
Sheldon X.-D. Tan 3.5k 0.5× 198 0.1× 1.1k 0.7× 271 0.3× 319 0.7× 366 4.2k

Countries citing papers authored by Manoj Sachdev

Since Specialization
Citations

This map shows the geographic impact of Manoj Sachdev's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Manoj Sachdev with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Manoj Sachdev more than expected).

Fields of papers citing papers by Manoj Sachdev

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Manoj Sachdev. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Manoj Sachdev. The network helps show where Manoj Sachdev may publish in the future.

Co-authorship network of co-authors of Manoj Sachdev

This figure shows the co-authorship network connecting the top 25 collaborators of Manoj Sachdev. A scholar is included among the top collaborators of Manoj Sachdev based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Manoj Sachdev. Manoj Sachdev is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Sachdev, Manoj, et al.. (2024). A power-efficient, single-phase, contention-free flip-flop with only three clock transistors. Microelectronics Journal. 152. 106390–106390. 2 indexed citations
2.
Sachdev, Manoj, et al.. (2024). VLFF — A very low-power flip-flop with only two clock transistors. Integration. 100. 102300–102300.
3.
Li, Peng, et al.. (2023). Helimagnet-based nonvolatile multi-bit memory units. Applied Physics Letters. 122(15). 2 indexed citations
4.
Sachdev, Manoj, et al.. (2022). Design and Implementation of a Secure RISC-V Microprocessor. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 30(11). 1705–1715. 7 indexed citations
5.
Patel, Hiren, et al.. (2022). Enhancing Strong PUF Security With Nonmonotonic Response Quantization. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 31(1). 55–64. 3 indexed citations
6.
Sachdev, Manoj, et al.. (2021). A 350 mV, 2 MHz, 16-kb SRAM with programmable wordline boosting in the 65 nm CMOS technology. Analog Integrated Circuits and Signal Processing. 109(1). 213–224. 3 indexed citations
7.
Yoon, Youngki, et al.. (2020). Monitoring Aging Defects in STT-MRAMs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39(12). 4645–4656. 9 indexed citations
8.
Asad, Mohsen, Qing Li, Czang-Ho Lee, Manoj Sachdev, & William S. Wong. (2019). Integration of GaN light-emitting diodes with a-Si:H thin-film transistors for flexible displays. Nanotechnology. 30(32). 324003–324003. 22 indexed citations
9.
Yoon, Youngki, et al.. (2019). A Parametric DFT Scheme for STT-MRAMs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 27(7). 1685–1696. 7 indexed citations
10.
Sachdev, Manoj, et al.. (2017). A 290-mV, 3.34-MHz, 6T SRAM With pMOS Access Transistors and Boosted Wordline in 65-nm CMOS Technology. IEEE Journal of Solid-State Circuits. 53(2). 656–667. 34 indexed citations
11.
Li, David, Pierce Chuang, David Nairn, & Manoj Sachdev. (2011). Design and analysis of metastable-hardened flip-flops in sub-threshold region. 157–162. 8 indexed citations
12.
Sachdev, Manoj & José Pineda de Gyvez. (2007). Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits (Frontiers in Electronic Testing). Springer eBooks. 6 indexed citations
13.
Vassighi, A. & Manoj Sachdev. (2006). Thermal and Power Management of Integrated Circuits (Series on Integrated Circuits and Systems). Springer eBooks. 6 indexed citations
14.
Maymandi‐Nejad, Mohammad & Manoj Sachdev. (2005). A 0.8V Delta-Sigma modulator using DTMOS technique.. International Symposium on Circuits and Systems. 3684–3687. 2 indexed citations
15.
Rusu, Stefan, Manoj Sachdev, C. Svensson, & Bram Nauta. (2002). T3: Trends and Challenges in VLSI Technology Scaling towards 100nm. Asia and South Pacific Design Automation Conference. 16–17. 7 indexed citations
16.
Sachdev, Manoj, et al.. (2002). Low power, testable dual edge triggered flip-flops. 341–345. 37 indexed citations
17.
Sachdev, Manoj. (1996). Test and testability techniques for open defects in RAM address decoders. 428–434. 17 indexed citations
18.
Sachdev, Manoj. (1996). Deep Sub-micron I DDQ Test Options. International Test Conference. 942. 6 indexed citations
19.
Sachdev, Manoj, et al.. (1995). Defect-oriented test methodology for complex mixed-signal circuits. 18–23. 22 indexed citations
20.
Sachdev, Manoj. (1994). Defect Oriented Analog Testing: Strengths and Weaknesses. European Solid-State Circuits Conference. 224–227. 11 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026