K. Kinoshita

1.8k citations

78 papers · 1.3k indexed · h-index 19

Electrical and Electronic Engineering top 5%
Hardware and Architecture top 0.5%
Control and Systems Engineering top 10%
Software top 5%
Computer Networks and Communications

Co-authors: Seiji Kajihara Irith Pomeranz S.M. Reddy Kewal K. Saluja Laung‐Terng Wang Yoshiyuki Yamashita Xiaoqing Wen Hideo Fujiwara
Topics: VLSI and Analog Circuit Testing (66 papers)Integrated Circuits and Semiconductor Failure Analysis (54 papers)Radiation Effects in Electronics (26 papers)
Cited by: Hardware and Architecture Electrical and Electronic Engineering Software
Journals: IEEE Journal of Solid-State Circuits IEEE Transactions on Electron Devices IEEE Transactions on Computers
Partner nations: Japan United States Spain

In The Last Decade

K. Kinoshita

72 papers receiving 1.2k citations

Peers

Countries citing papers authored by K. Kinoshita

Since Specialization

Citations

This map shows the geographic impact of K. Kinoshita's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Kinoshita with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Kinoshita more than expected).

Fields of papers citing papers by K. Kinoshita

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by K. Kinoshita. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Kinoshita. The network helps show where K. Kinoshita may publish in the future.

Co-authorship network of co-authors of K. Kinoshita

This figure shows the co-authorship network connecting the top 25 collaborators of K. Kinoshita. A scholar is included among the top collaborators of K. Kinoshita based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with K. Kinoshita. K. Kinoshita is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Spintronics primitive gate with high error correction efficiency 6(P<inf>error</inf>)<sup>2</sup> for logic-in memory architecture 2012 ·Y. Tsuji,Ryusuke Nebashi,Noboru Sakimura,A. Morioka,H. Honjo,K. Tokutome,S. Miura,Tetsuya Suzuki,Shunsuke Fukami,K. Kinoshita,Takahiro Hanyu,Tetsuo Endoh,N. Kasai,Hideo Ohno,Tadahiko Sugibayashi	11
2	Low-capture-power test generation for scan-based at-speed testing 2006 ·Xiaoqing Wen,Yoshiyuki Yamashita,(unknown),Seiji Kajihara,Laung‐Terng Wang,Kewal K. Saluja,K. Kinoshita	107
3	On Configuring Scan Trees to Reduce Scan Shifts based on a Circuit Structure 2005 ·(unknown),(unknown),(unknown),Masaki Hashizume,K. Kinoshita	4
4	Row/column pattern sensitive fault detection in RAMs via built-in self-test 2003 ·M. Franklin,Kewal K. Saluja,K. Kinoshita	3
5	Procedure to overcome the Byzantine General's problem for bridging faults in CMOS circuits 2003 ·(unknown),Yoshio Miura,K. Kinoshita	2
6	Design of a BIST RAM with row/column pattern sensitive fault detection capability 2003 ·M. Franklin,Kewal K. Saluja,K. Kinoshita	2
7	On test generation with a limited number of tests 2003 ·Hideyuki Ichihara,Seiji Kajihara,K. Kinoshita	0
8	A case study of mixed-signal integrated circuit testing: an application of current testing using the upper limit and the lower limit 2002 ·Yoshio Miura,(unknown),K. Kinoshita	6
9	A new adaptive resurf concept for 20 V LDMOS without breakdown voltage degradation at high current 2002 ·K. Kinoshita,Yoshimasa Kawaguchi,A. Nakagawa	23
10	Undetectable fault removal of sequential circuits based on unreachable states 2002 ·(unknown),K. Kinoshita	5
11	Fault detection and diagnosis of k-UCP circuits under totally observable condition 2002 ·Xiaoqing Wen,K. Kinoshita	2
12	A high-speed IDDQ sensor implementation 2002 ·(unknown),(unknown),S. Nishikawa,K. Kinoshita	3
13	Built-in self-test for multiple CLB faults of a LUT type FPGA 2002 ·(unknown),(unknown),(unknown),K. Kinoshita	8
14	100 MHz IDDQ sensor design with 1 μA resolution for BIST applications 2002 ·(unknown),K. Kinoshita,S. Nishikawa,Hirotsugu Uemura	6
15	Design for diagnosability of CMOS circuits 2002 ·Xiaoqing Wen,(unknown),(unknown),Kewal K. Saluja,K. Kinoshita	3
16	On the evaluation of process-fault tolerance ability of CMOS integrated circuits 2002 ·Étienne Sicard,K. Kinoshita	2
17	Finding unreachable states of sequential circuits 1999 ·(unknown),K. Kinoshita	0
18	An approach to the analysis and detection of crosstalk faults in digital VLSI circuits 1994 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Antonio Rubio,(unknown),Xin Xu,K. Kinoshita	82
19	CONT: a concurrent test generation system 1989 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Yuzo Takamatsu,K. Kinoshita	3
20	Built-in testing of memory using on-chip compact testing scheme 1984 ·International Test Conference ·K. Kinoshita,Kewal K. Saluja	10

About K. Kinoshita

K. Kinoshita is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Software, having authored 78 papers that have together received 1.3k indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (66 papers), Integrated Circuits and Semiconductor Failure Analysis (54 papers) and Radiation Effects in Electronics (26 papers). The work is most often cited by research in Hardware and Architecture (1.1k citations), Electrical and Electronic Engineering (1.2k citations) and Software (57 citations). K. Kinoshita has collaborated with scholars based in Japan, United States and Spain. Frequent co-authors include Seiji Kajihara, Irith Pomeranz, S.M. Reddy, Kewal K. Saluja, Laung‐Terng Wang, Yoshiyuki Yamashita, Xiaoqing Wen, Hideo Fujiwara, Antonio Rubio and Xin Xu. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Computers.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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