Chi-Feng Wu
- Electrical and Electronic Engineering top 10%
- Hardware and Architecture top 1%
- Computer Networks and Communications top 10%
- Control and Systems Engineering top 10%
- Biomedical Engineering
- Co-authors
- Cheng‐Wen WuChih-Tsun HuangJin-Fu LiJing-Reng HuangTsin‐Yuan ChangKuo-Liang ChengChua‐Chin WangKevin Kuan‐Shun Chiu
- Topics
- VLSI and Analog Circuit Testing (24 papers)Integrated Circuits and Semiconductor Failure Analysis (20 papers)Radiation Effects in Electronics (9 papers)
- Journals
- IEEE Journal of Solid-State CircuitsElectronics LettersIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Partner nations
- TaiwanUnited States
In The Last Decade
Chi-Feng Wu
31 papers receiving 617 citations
Peers
Comparison fields: 5 of 24
- Electrical and Electronic Engineering 572
- Hardware and Architecture 541
- Computer Networks and Communications 135
- Control and Systems Engineering 63
- Biomedical Engineering 34
Countries citing papers authored by Chi-Feng Wu
This map shows the geographic impact of Chi-Feng Wu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chi-Feng Wu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chi-Feng Wu more than expected).
Fields of papers citing papers by Chi-Feng Wu
This network shows the impact of papers produced by Chi-Feng Wu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chi-Feng Wu. The network helps show where Chi-Feng Wu may publish in the future.
Co-authorship network of co-authors of Chi-Feng Wu
This figure shows the co-authorship network connecting the top 25 collaborators of Chi-Feng Wu. A scholar is included among the top collaborators of Chi-Feng Wu based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chi-Feng Wu. Chi-Feng Wu is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 2 | |
| 2 | 1 | |
| 3 | 1 | |
| 4 | 1 | |
| 5 | 8 | |
| 6 | 5 | |
| 7 | 163 | |
| 8 | 27 | |
| 9 | 61 | |
| 10 | 18 | |
| 11 | 6 | |
| 12 | 34 | |
| 13 | 1 | |
| 14 | 9 | |
| 15 | 3 | |
| 16 | 2 | |
| 17 | 4 | |
| 18 | 2 | |
| 19 | 106 | |
| 20 | 2 |
About Chi-Feng Wu
Chi-Feng Wu is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Industrial and Manufacturing Engineering, having authored 31 papers that have together received 658 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (24 papers), Integrated Circuits and Semiconductor Failure Analysis (20 papers) and Radiation Effects in Electronics (9 papers). The work is most often cited by research in Hardware and Architecture (541 citations), Electrical and Electronic Engineering (572 citations) and Software (29 citations). Chi-Feng Wu has collaborated with scholars based in Taiwan and United States. Frequent co-authors include Cheng‐Wen Wu, Chih-Tsun Huang, Jin-Fu Li, Jing-Reng Huang, Tsin‐Yuan Chang, Kuo-Liang Cheng, Chua‐Chin Wang, Kevin Kuan‐Shun Chiu, Jen-Chieh Yeh and Yung-Fa Chou. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Electronics Letters and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.