Kuo-Liang Cheng

510 total citations
23 papers, 388 citations indexed

About

Kuo-Liang Cheng is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Control and Systems Engineering. According to data from OpenAlex, Kuo-Liang Cheng has authored 23 papers receiving a total of 388 indexed citations (citations by other indexed papers that have themselves been cited), including 21 papers in Hardware and Architecture, 20 papers in Electrical and Electronic Engineering and 9 papers in Control and Systems Engineering. Recurrent topics in Kuo-Liang Cheng's work include VLSI and Analog Circuit Testing (20 papers), Integrated Circuits and Semiconductor Failure Analysis (19 papers) and Engineering and Test Systems (9 papers). Kuo-Liang Cheng is often cited by papers focused on VLSI and Analog Circuit Testing (20 papers), Integrated Circuits and Semiconductor Failure Analysis (19 papers) and Engineering and Test Systems (9 papers). Kuo-Liang Cheng collaborates with scholars based in Taiwan and United States. Kuo-Liang Cheng's co-authors include Cheng‐Wen Wu, Chih-Tsun Huang, Jen-Chieh Yeh, Yung-Fa Chou, Chi-Feng Wu, Jin-Fu Li, Jing-Reng Huang, Youn-Long Lin, Chih-Pin Su and Chee-Kian Ong and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and Energy Sources Part B Economics Planning and Policy.

In The Last Decade

Kuo-Liang Cheng

23 papers receiving 359 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Kuo-Liang Cheng Taiwan	11	339	337	67	57	21	23	388
Samy Makar United States	10	343 1.0×	310 0.9×	62 0.9×	25 0.4×	16 0.8×	16	380
Jen-Chieh Yeh Taiwan	11	314 0.9×	365 1.1×	162 2.4×	39 0.7×	7 0.3×	39	430
Mahesh A. Iyer United States	13	442 1.3×	447 1.3×	32 0.5×	15 0.3×	28 1.3×	34	507
M.H. Tehranipour United States	8	268 0.8×	265 0.8×	48 0.7×	42 0.7×	6 0.3×	13	302
P.T. Gonciari United Kingdom	8	392 1.2×	414 1.2×	43 0.6×	63 1.1×	19 0.9×	15	426
K. Baker Netherlands	11	321 0.9×	311 0.9×	32 0.5×	27 0.5×	7 0.3×	30	371
Saman Adham Canada	8	277 0.8×	198 0.6×	29 0.4×	33 0.6×	5 0.2×	22	312
Jeff Rearick United States	12	594 1.8×	609 1.8×	27 0.4×	95 1.7×	24 1.1×	38	638
D.B. Lavo United States	9	304 0.9×	306 0.9×	96 1.4×	64 1.1×	13 0.6×	10	397
Sudipta Bhawmik United States	14	396 1.2×	395 1.2×	22 0.3×	32 0.6×	12 0.6×	34	450

Countries citing papers authored by Kuo-Liang Cheng

Since Specialization

Citations

This map shows the geographic impact of Kuo-Liang Cheng's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Kuo-Liang Cheng with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Kuo-Liang Cheng more than expected).

Fields of papers citing papers by Kuo-Liang Cheng

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Kuo-Liang Cheng. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Kuo-Liang Cheng. The network helps show where Kuo-Liang Cheng may publish in the future.

Co-authorship network of co-authors of Kuo-Liang Cheng

This figure shows the co-authorship network connecting the top 25 collaborators of Kuo-Liang Cheng. A scholar is included among the top collaborators of Kuo-Liang Cheng based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Kuo-Liang Cheng. Kuo-Liang Cheng is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

Hsu, Tzu-Kuang, et al.. (2016). Forecast of 2013–2025 crude oil prices: Quadratic sine-curve trend model application. Energy Sources Part B Economics Planning and Policy. 11(3). 205–211. 7 indexed citations

Cheng, Kuo-Liang, et al.. (2007). STEAC: A Platform for Automatic SOC Test Integration. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 15(5). 541–545. 9 indexed citations

Yeh, Jen-Chieh, Kuo-Liang Cheng, Yung-Fa Chou, & Cheng‐Wen Wu. (2007). Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test Algorithms. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 26(6). 1101–1113. 33 indexed citations

Su, Chih-Pin, et al.. (2005). Design and test of a scalable security processor. 1. 372–375. 2 indexed citations

Su, Chih-Pin, et al.. (2005). Design and test of a scalable security processor. 372–372. 6 indexed citations

Cheng, Kuo-Liang, et al.. (2005). An SOC test integration platform and its industrial realization. 8. 1213–1222. 5 indexed citations

Cheng, Kuo-Liang, et al.. (2004). Fault pattern oriented defect diagnosis for memories. 1. 29–38. 16 indexed citations

Cheng, Kuo-Liang, et al.. (2003). FAME: A Fault-Pattern Based Memory Failure Analysis Framework. International Conference on Computer Aided Design. 595–598. 8 indexed citations

Cheng, Kuo-Liang, et al.. (2003). RAMSES-FT: a fault simulator for flash memory testing and diagnostics. 281–286. 34 indexed citations

10.

Yeh, Jen-Chieh, Chi-Feng Wu, Kuo-Liang Cheng, et al.. (2003). Flash memory built-in self-test using March-like algorithms. 137–141. 41 indexed citations

11.

Cheng, Kuo-Liang, et al.. (2003). FAME: a fault-pattern based memory failure analysis framework. 595–598. 7 indexed citations

12.

Huang, Jing-Reng, et al.. (2003). Test scheduling of BISTed memory cores for SoC. 356–361. 20 indexed citations

13.

Huang, Jing-Reng, et al.. (2003). Test scheduling and test access architecture optimization for system-on-chip. 8. 411–416. 12 indexed citations

14.

Cheng, Kuo-Liang, et al.. (2002). Automatic generation of memory built-in self-test cores for system-on-chip. 91–96. 17 indexed citations

15.

Wu, Chi-Feng, et al.. (2002). Error catch and analysis for semiconductor memories using March tests. 468–471. 6 indexed citations

16.

Cheng, Kuo-Liang, et al.. (2002). Neighborhood pattern-sensitive fault testing and diagnostics for random-access memories. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 21(11). 1328–1336. 39 indexed citations

17.

Ong, Chee-Kian, et al.. (2002). An FPGA-based re-configurable functional tester for memory chips. Rare & Special e-Zone (The Hong Kong University of Science and Technology). 51–57. 7 indexed citations

18.

Cheng, Kuo-Liang, et al.. (2002). Efficient neighborhood pattern-sensitive fault test algorithms for semiconductor memories. 225–230. 17 indexed citations

19.

Wu, Chi-Feng, et al.. (2002). Simulation-based test algorithm generation and port scheduling for multi-port memories. 301–306. 1 indexed citations

20.

Wu, Chi-Feng, et al.. (2001). Simulation-based test algorithm generation and port scheduling for multi-port memories. 301–306. 9 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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