Stephen Sunter

1.3k total citations
45 papers, 873 citations indexed

About

Stephen Sunter is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Stephen Sunter has authored 45 papers receiving a total of 873 indexed citations (citations by other indexed papers that have themselves been cited), including 43 papers in Electrical and Electronic Engineering, 36 papers in Hardware and Architecture and 10 papers in Biomedical Engineering. Recurrent topics in Stephen Sunter's work include VLSI and Analog Circuit Testing (36 papers), Integrated Circuits and Semiconductor Failure Analysis (29 papers) and Advancements in PLL and VCO Technologies (14 papers). Stephen Sunter is often cited by papers focused on VLSI and Analog Circuit Testing (36 papers), Integrated Circuits and Semiconductor Failure Analysis (29 papers) and Advancements in PLL and VCO Technologies (14 papers). Stephen Sunter collaborates with scholars based in United States, Canada and Taiwan. Stephen Sunter's co-authors include Aubin Roy, N. Nagi, Wu-Tung Cheng, Kun-Han Tsai, Shi‐Yu Huang, Haralampos‐G. Stratigopoulos, Ding-Ming Kwai, Yung-Fa Chou, D. Appello and Colin F. McDonald and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Transactions on Circuits and Systems I Regular Papers.

In The Last Decade

Stephen Sunter

42 papers receiving 783 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Stephen Sunter United States 18 825 638 209 46 33 45 873
Kaviraj Chopra United States 17 851 1.0× 556 0.9× 64 0.3× 16 0.3× 59 1.8× 31 899
Yiorgos Tsiatouhas Greece 11 603 0.7× 323 0.5× 85 0.4× 15 0.3× 26 0.8× 113 631
E. Malavasi United States 13 694 0.8× 509 0.8× 80 0.4× 19 0.4× 54 1.6× 41 753
D.M.H. Walker United States 21 1.2k 1.4× 1.1k 1.7× 43 0.2× 67 1.5× 15 0.5× 85 1.2k
F. De Bernardinis Italy 14 636 0.8× 286 0.4× 347 1.7× 26 0.6× 107 3.2× 35 808
Kuen-Jong Lee Taiwan 20 1.2k 1.5× 1.2k 1.8× 128 0.6× 189 4.1× 97 2.9× 140 1.3k
Witold A. Pleskacz Poland 11 317 0.4× 229 0.4× 90 0.4× 17 0.4× 59 1.8× 102 425
Mango C.-T. Chao Taiwan 14 454 0.6× 335 0.5× 20 0.1× 26 0.6× 38 1.2× 78 515
Chi-Feng Wu Taiwan 12 572 0.7× 541 0.8× 34 0.2× 63 1.4× 135 4.1× 31 658
A. Albicki United States 10 449 0.5× 127 0.2× 68 0.3× 57 1.2× 43 1.3× 37 479

Countries citing papers authored by Stephen Sunter

Since Specialization
Citations

This map shows the geographic impact of Stephen Sunter's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Stephen Sunter with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Stephen Sunter more than expected).

Fields of papers citing papers by Stephen Sunter

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Stephen Sunter. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Stephen Sunter. The network helps show where Stephen Sunter may publish in the future.

Co-authorship network of co-authors of Stephen Sunter

This figure shows the co-authorship network connecting the top 25 collaborators of Stephen Sunter. A scholar is included among the top collaborators of Stephen Sunter based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Stephen Sunter. Stephen Sunter is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Sunter, Stephen, et al.. (2024). Digital Scan and ATPG for Analog Circuits. 339–347.
2.
Sunter, Stephen, et al.. (2024). A Method for Simulating Mixed-Signal ATE Tests. 1–7. 1 indexed citations
3.
Sunter, Stephen, et al.. (2020). Quick Analyses for Improving Reliability and Functional Safety of Mixed-Signal ICs. 2 indexed citations
4.
Sunter, Stephen. (2019). Efficient Analog Defect Simulation. 1–10. 20 indexed citations
5.
Sunter, Stephen, et al.. (2016). Using Mixed-Signal Defect Simulation to Close the Loop Between Design and Test. IEEE Transactions on Circuits and Systems I Regular Papers. 63(12). 2313–2322. 21 indexed citations
6.
Sunter, Stephen, et al.. (2016). Streaming Access to ADCs and DACs for Mixed-Signal ATPG. IEEE Design and Test. 33(6). 38–45. 3 indexed citations
7.
Sunter, Stephen, et al.. (2015). Streaming fast access to ADCs and DACs for mixed-signal ATPG. 1–8. 4 indexed citations
8.
Sunter, Stephen, et al.. (2014). Practical random sampling of potential defects for analog fault simulation. 1–10. 41 indexed citations
9.
Huang, Shi‐Yu, Kun-Han Tsai, Wu-Tung Cheng, et al.. (2013). Parametric Delay Test of Post-Bond Through-Silicon Vias in 3-D ICs via Variable Output Thresholding Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 32(5). 737–747. 36 indexed citations
10.
Tsai, Kun-Han, et al.. (2012). A unified method for parametric fault characterization of post-bond TSVs. 1–10. 11 indexed citations
11.
Sunter, Stephen & Aubin Roy. (2011). Adaptive parametric BIST of high-speed parallel I/Os via standard boundary scan. 57. 1–9. 2 indexed citations
12.
Sunter, Stephen, et al.. (2010). Experiences with parametric BIST for production testing PLLs with picosecond precision. 1–9. 13 indexed citations
13.
Sunter, Stephen & Kenneth P. Parker. (2009). Testing bridges to nowhere - combining Boundary Scan and capacitive sensing. 44. 1–10. 7 indexed citations
14.
Sunter, Stephen & Aubin Roy. (2007). A selt-testing BOST for high-frequency PLLs, DLLs, and SerDes. 1–8. 11 indexed citations
15.
Sunter, Stephen & Aubin Roy. (2006). Structural tests for jitter tolerance in serdes receivers. 38. 188–197. 19 indexed citations
16.
Sunter, Stephen & Aubin Roy. (2004). On-chip digital jitter measurement, from megahertz to gigahertz. IEEE Design & Test of Computers. 21(4). 314–321. 55 indexed citations
17.
Sunter, Stephen & Aubin Roy. (2003). BIST for phase-locked loops in digital applications. 532–540. 94 indexed citations
18.
Sunter, Stephen & N. Nagi. (2002). A simplified polynomial-fitting algorithm for DAC and ADC BIST. 389–395. 107 indexed citations
19.
Sunter, Stephen, et al.. (2002). Contactless digital testing of IC pin leakage currents. 204–210. 18 indexed citations
20.
Williams, T.W. & Stephen Sunter. (2000). How Should Fault Coverage Be Defined. 325–328. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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