Yi-Shing Chang

525 total citations
28 papers, 351 citations indexed

About

Yi-Shing Chang is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Artificial Intelligence. According to data from OpenAlex, Yi-Shing Chang has authored 28 papers receiving a total of 351 indexed citations (citations by other indexed papers that have themselves been cited), including 27 papers in Electrical and Electronic Engineering, 15 papers in Hardware and Architecture and 3 papers in Artificial Intelligence. Recurrent topics in Yi-Shing Chang's work include VLSI and Analog Circuit Testing (15 papers), Integrated Circuits and Semiconductor Failure Analysis (10 papers) and Low-power high-performance VLSI design (10 papers). Yi-Shing Chang is often cited by papers focused on VLSI and Analog Circuit Testing (15 papers), Integrated Circuits and Semiconductor Failure Analysis (10 papers) and Low-power high-performance VLSI design (10 papers). Yi-Shing Chang collaborates with scholars based in United States, Hong Kong and United Kingdom. Yi-Shing Chang's co-authors include M.A. Breuer, Sandip Kundu, Sidharth Gupta, Susmita Sur‐Kolay, Sandeep K. Gupta, Sreejit Chakravarty, Zhifei Wang, Jiang Xu, Zhehui Wang and Peng Yang and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Journal of Electronic Testing.

In The Last Decade

Yi-Shing Chang

25 papers receiving 335 citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
Yi-Shing Chang 341 232 28 25 16 28 351
P. Pant 418 1.2× 253 1.1× 27 1.0× 8 0.3× 21 1.3× 24 449
W. Huott 338 1.0× 242 1.0× 19 0.7× 10 0.4× 22 1.4× 23 357
David J. Garrod 439 1.3× 338 1.5× 24 0.9× 13 0.5× 18 1.1× 7 453
Masaki Hashizume 215 0.6× 158 0.7× 14 0.5× 7 0.3× 12 0.8× 100 236
Jean-Marc Daveau 184 0.5× 97 0.4× 29 1.0× 8 0.3× 28 1.8× 26 218
Liang-Teck Pang 431 1.3× 165 0.7× 50 1.8× 9 0.4× 18 1.1× 16 445
Victor Champac 704 2.1× 432 1.9× 36 1.3× 6 0.2× 9 0.6× 100 720
K. Koyama 257 0.8× 83 0.4× 52 1.9× 8 0.3× 32 2.0× 27 270
A.U. Diril 292 0.9× 191 0.8× 16 0.6× 4 0.2× 20 1.3× 16 298
Y.S. Dhillon 283 0.8× 186 0.8× 16 0.6× 4 0.2× 20 1.3× 14 289

Countries citing papers authored by Yi-Shing Chang

Since Specialization
Citations

This map shows the geographic impact of Yi-Shing Chang's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yi-Shing Chang with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yi-Shing Chang more than expected).

Fields of papers citing papers by Yi-Shing Chang

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yi-Shing Chang. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yi-Shing Chang. The network helps show where Yi-Shing Chang may publish in the future.

Co-authorship network of co-authors of Yi-Shing Chang

This figure shows the co-authorship network connecting the top 25 collaborators of Yi-Shing Chang. A scholar is included among the top collaborators of Yi-Shing Chang based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yi-Shing Chang. Yi-Shing Chang is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Wang, Zhifei, Yi-Shing Chang, Jiang Xu, et al.. (2019). Modeling and Analysis of Optical Modulators Based on Free-Carrier Plasma Dispersion Effect. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39(5). 977–990. 16 indexed citations
2.
Yang, Peng, et al.. (2019). Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39(3). 626–639. 5 indexed citations
3.
Wang, Zhifei, et al.. (2019). A Cross-Layer Optimization Framework for Integrated Optical Switches in Data Centers. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39(3). 640–653. 7 indexed citations
4.
Wang, Zhehui, et al.. (2019). CAMON: Low-Cost Silicon Photonic Chiplet for Manycore Processors. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39(9). 1820–1833. 15 indexed citations
5.
Kim, Woosung, et al.. (2018). Machine learning application for silicon photonics transceiver testing. 39.5. 14–14.
6.
Wang, Zhifei, Peng Yang, Yi-Shing Chang, et al.. (2018). Cross-Layer Optimization for High-Radix Integrated Optical Switches in Data Centers. Rare & Special e-Zone (The Hong Kong University of Science and Technology). 35–36. 2 indexed citations
7.
Wang, Zhifei, Yi-Shing Chang, Jiang Xu, et al.. (2018). A Comprehensive Electro-Optical Model for Silicon Photonic Switches. Rare & Special e-Zone (The Hong Kong University of Science and Technology). 76–81. 1 indexed citations
8.
Kang, Jian, et al.. (2008). Efficient Selection of Observation Points for Functional Tests. 236–241. 3 indexed citations
9.
Jas, Abhijit, Yi-Shing Chang, & Sreejit Chakravarty. (2006). An Approach to Minimizing Functional Constraints. 215–226. 15 indexed citations
10.
Chakravarty, S., et al.. (2005). Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. 337–342. 9 indexed citations
11.
Kundu, Sandip, et al.. (2005). On modeling crosstalk faults. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 24(12). 1909–1915. 41 indexed citations
12.
Kundu, Sandip, et al.. (2004). A modeling approach for addressing power supply switching noise related failures of integrated circuits. Proceedings Design, Automation and Test in Europe Conference and Exhibition. 1078–1083. 42 indexed citations
13.
Chen, Thou-Ho, Liang‐Gee Chen, & Yi-Shing Chang. (2003). Design of concurrent error-detectable VLSI-based array dividers. NTUR (臺灣機構典藏). 72–75. 2 indexed citations
14.
Chang, Yi-Shing, Sandeep K. Gupta, & M.A. Breuer. (2003). Test generation for ground bounce in internal logic circuitry. 95–104. 17 indexed citations
15.
Chang, Yi-Shing, et al.. (2003). On modeling cross-talk faults [VLSI circuits]. 2003 Design, Automation and Test in Europe Conference and Exhibition. 136. 490–495. 8 indexed citations
16.
Chang, Yi-Shing, Sandeep K. Gupta, & M.A. Breuer. (2003). Test generation for maximizing ground bounce considering circuit delay. 12. 151–157. 2 indexed citations
17.
18.
Yang, A.T., Yi-Shing Chang, D.G. Saab, & I.N. Hajj. (1993). Switch-level timing simulation of bipolar ECL circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 12(4). 516–530. 3 indexed citations
19.
Yang, A.T. & Yi-Shing Chang. (1992). Physical timing modeling for bipolar VLSI. IEEE Journal of Solid-State Circuits. 27(9). 1245–1254. 8 indexed citations
20.
Yang, A.T. & Yi-Shing Chang. (1991). A physical timing model for digital bipolar ECL circuits. 9. 2168–2171 vol.4. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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