M.A. Breuer

3.5k total citations
122 papers, 2.4k citations indexed

About

M.A. Breuer is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, M.A. Breuer has authored 122 papers receiving a total of 2.4k indexed citations (citations by other indexed papers that have themselves been cited), including 102 papers in Hardware and Architecture, 99 papers in Electrical and Electronic Engineering and 18 papers in Computer Networks and Communications. Recurrent topics in M.A. Breuer's work include VLSI and Analog Circuit Testing (92 papers), Integrated Circuits and Semiconductor Failure Analysis (52 papers) and VLSI and FPGA Design Techniques (39 papers). M.A. Breuer is often cited by papers focused on VLSI and Analog Circuit Testing (92 papers), Integrated Circuits and Semiconductor Failure Analysis (52 papers) and VLSI and FPGA Design Techniques (39 papers). M.A. Breuer collaborates with scholars based in United States, Taiwan and India. M.A. Breuer's co-authors include Sandeep K. Gupta, Wei-Yu Chen, Terrence Mak, S. Chowdhury, Rajesh K. Gupta, Sandeep K. S. Gupta, Yi-Shing Chang, Kuen-Jong Lee, Sridhar Narayanan and Sidharth Gupta and has published in prestigious journals such as Proceedings of the IEEE, IEEE Transactions on Information Theory and IEEE Transactions on Industrial Electronics.

In The Last Decade

M.A. Breuer

117 papers receiving 2.3k citations

Peers

Countries citing papers authored by M.A. Breuer

Since Specialization

Citations

This map shows the geographic impact of M.A. Breuer's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M.A. Breuer with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M.A. Breuer more than expected).

Fields of papers citing papers by M.A. Breuer

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M.A. Breuer. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M.A. Breuer. The network helps show where M.A. Breuer may publish in the future.

Co-authorship network of co-authors of M.A. Breuer

This figure shows the co-authorship network connecting the top 25 collaborators of M.A. Breuer. A scholar is included among the top collaborators of M.A. Breuer based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with M.A. Breuer. M.A. Breuer is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Minority Representation at Work 2024 ·SSRN Electronic Journal ·M.A. Breuer, (unknown), (unknown), (unknown)	0
2	Test Generation for Weak Resistive Bridges 2006 ·(unknown), Sandeep K. Gupta, M.A. Breuer	1
3	Multi-media Applications and Imprecise Computation 2005 ·M.A. Breuer	75
4	Determining error rate in error tolerant VLSI chips 2005 ·M.A. Breuer	9
5	Cbase 1.0: a CAD database for VLSI circuits using object oriented technology 2003 ·M.A. Breuer, (unknown), Rajesh K. Gupta, (unknown), Ellis Horowitz, (unknown)	3
6	A partitioning method for achieving maximal test concurrency in pseudo-exhaustive testing 2002 ·Rajagopalan Srinivasan, (unknown), M.A. Breuer	2
7	A new method for assigning signal flow directions to MOS transistors 2002 ·(unknown), Ratnesh Gupta, M.A. Breuer	1
8	Validation and test issues related to noise induced by parasitic inductances of VLSI interconnects 2002 ·IEEE Transactions on Advanced Packaging ·(unknown), Sandeep K. Gupta, M.A. Breuer	21
9	Fundamental CAD algorithms 2000 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·M.A. Breuer, Majid Sarrafzadeh, Fabio Somenzi	11
10	Scheduling and module assignment for reducing BIST resources 1998 ·Design, Automation, and Test in Europe ·(unknown), Sandeep K. Gupta, M.A. Breuer	10
11	SWiTEST: a switch level test generation system for CMOS combinational circuits 1992 ·Design Automation Conference ·(unknown), (unknown), M.A. Breuer	8
12	Minimal area sizing of power and ground nets for VLSI circuits 1986 ·S. Chowdhury, M.A. Breuer	12
13	The construction of minimal area power and ground nets for VLSI circuits 1985 ·S. Chowdhury, M.A. Breuer	8
14	A Module Interchange Placement Machine 1983 ·Design Automation Conference ·(unknown), Carey W. King, M.A. Breuer	15
15	On Routing for Custom Integrated Circuits 1982 ·Design Automation Conference ·(unknown), Abbas El Gamal, M.A. Breuer	15
16	State-of-the-Art Assessment of Testing and Testability of Custom LSI/VLSI Circuits. Volume VI. Redundancy, Testing Circuits, and Codes. 1982 ·Defense Technical Information Center (DTIC) ·M.A. Breuer, (unknown)	1
17	Correction to 'A Force Directed Component Placement Procedure for Printed Circuit Boards' 1980 ·IEEE Transactions on Circuits and Systems ·(unknown), M.A. Breuer	2
18	Incremental Processing Applied to Steinberg's Placement Procedure 1979 ·Design Automation Conference ·(unknown), M.A. Breuer, (unknown)	3
19	Concurrent fault simulation and functional level modeling 1977 ·Design Automation Conference ·M. Abramovici, M.A. Breuer, K. Vinoth Kumar	32
20	Some theoretical aspects of algorithmic routing 1977 ·Design Automation Conference ·Pratima Agarwal, M.A. Breuer	15

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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