Vikram Iyengar

17 papers receiving 492 citations

Hit Papers

Test Wrapper and Test Access Mechanism Co-Optimization fo...20022026201020182002100200300

Peers

Vikram Iyengar
Comparison fields: 5 of 30
  • Hardware and Architecture 495
  • Electrical and Electronic Engineering 482
  • Computer Networks and Communications 73
  • Control and Systems Engineering 50
  • Software 15
Replace D. Josephson with:
D. Josephson United States
Kee Sup Kim United States
D.K. Bhavsar United States
W. Huott United States
J.-F. Naviner France
Kazumi Hatayama Japan
A.S.M. Hassan Canada
Gerard Rauwerda Netherlands
P. Franco United States
G. Harutyunyan Switzerland
Vikram Iyengar relative to D. Josephson United States D. Josephson's profile →
Citations per field
00.5×
D. Josephson · 1×
Citations per year

Countries citing papers authored by Vikram Iyengar

Since Specialization
Citations

This map shows the geographic impact of Vikram Iyengar's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Vikram Iyengar with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Vikram Iyengar more than expected).

Fields of papers citing papers by Vikram Iyengar

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Vikram Iyengar. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Vikram Iyengar. The network helps show where Vikram Iyengar may publish in the future.

Co-authorship network of co-authors of Vikram Iyengar

This figure shows the co-authorship network connecting the top 25 collaborators of Vikram Iyengar. A scholar is included among the top collaborators of Vikram Iyengar based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Vikram Iyengar. Vikram Iyengar is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
#WorkIndexed citations
1
U. S. V. Jones: Inadequate to Promote Privacy for Citizens and Efficiency for Law Enforcement
0
2 1
3 12
4 4
5 0
6 23
7 2
8 1
9 42
10 2
11 2
12 2
13 20
14 17
15 1
16
Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chipbreakdown →
301
17 41
18 9
19 37
20 9

About Vikram Iyengar

Vikram Iyengar is a scholar working on Hardware and Architecture, Software and Electrical and Electronic Engineering, having authored 20 papers that have together received 526 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (14 papers), Integrated Circuits and Semiconductor Failure Analysis (10 papers) and VLSI and FPGA Design Techniques (7 papers). The work is most often cited by research in Hardware and Architecture (495 citations), Electrical and Electronic Engineering (482 citations) and Software (15 citations). Vikram Iyengar has collaborated with scholars based in United States, Netherlands and India. Frequent co-authors include Krishnendu Chakrabarty, Erik Jan Marinissen, B.T. Murray, Anuja Sehgal, Anshuman Chandra, Mark P. Taylor, D. J. Milton, Toshihiko Yokota, Peter Ha and Vladimir Zolotov. Their work appears in journals such as Information Processing Letters, Journal of Electronic Testing and SAE International journal of commercial vehicles.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026