D. Josephson
- Hardware and Architecture top 2%
- VLSI and Analog Circuit Testing 11
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- Integrated Circuits and Semiconductor Failure Analysis 9
- Low-power high-performance VLSI design 2
- Electrostatic Discharge in Electronics 2
- Advancements in Semiconductor Devices and Circuit Design 1
- VLSI and FPGA Design Techniques 1
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- Near-Field Optical Microscopy 2
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- Ion-surface interactions and analysis 1
- Co-authors
- Mark HorowitzSamuel NaffzigerJ. DesaiBlaine StackhouseE. AlonT. GrutkowskiB. ArnoldP. Pant
- Journals
- IEEE Journal of Solid-State Circuits (1 paper)Proceedings - ACM IEEE Design Automation Conference (1 paper)IEEE Design & Test of Computers (1 paper)
- Partner nations
- United StatesUnited Kingdom
In The Last Decade
D. Josephson
11 papers receiving 434 citations
Peers
Comparison fields: 5 of 21
- Hardware and Architecture 406
- Electrical and Electronic Engineering 444
- Software 12
- Computer Networks and Communications 45
- Control and Systems Engineering 19
Countries citing papers authored by D. Josephson
This map shows the geographic impact of D. Josephson's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Josephson with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Josephson more than expected).
Fields of papers citing papers by D. Josephson
This network shows the impact of papers produced by D. Josephson. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Josephson. The network helps show where D. Josephson may publish in the future.
Co-authorship network
The 9 scholars most cited alongside D. Josephson, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2009 | 32 | |
| 2 | 2006 | 49 | |
| 3 | 2006 | 6 | |
| 4 | 2005 | 141 | |
| 5 | 2004 | 31 | |
| 6 | 2003 | 46 | |
| 7 | 2002 | 111 | |
| 8 | 2002 | 13 | |
| 9 | 2002 | 18 | |
| 10 | 2002 | 2 | |
| 11 | 1995 | 35 |
About D. Josephson
D. Josephson is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Biomedical Engineering, Computational Mechanics and Infectious Diseases, having authored 11 papers that have together received 484 indexed citations. Recurring topics across this work include VLSI and Analog Circuit Testing (11 papers), Integrated Circuits and Semiconductor Failure Analysis (9 papers), Low-power high-performance VLSI design (2 papers), Near-Field Optical Microscopy (2 papers), Electrostatic Discharge in Electronics (2 papers), Advancements in Semiconductor Devices and Circuit Design (1 paper), VLSI and FPGA Design Techniques (1 paper) and Ion-surface interactions and analysis (1 paper). The work is most often cited by research in Hardware and Architecture (406 citations), Electrical and Electronic Engineering (444 citations), Software (12 citations), Computer Networks and Communications (45 citations) and Control and Systems Engineering (19 citations). D. Josephson has collaborated with scholars based in United States and United Kingdom. Frequent co-authors include Mark Horowitz, Samuel Naffziger, J. Desai, Blaine Stackhouse, E. Alon, T. Grutkowski, B. Arnold, P. Pant and Jim Ignowski. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Proceedings - ACM IEEE Design Automation Conference and IEEE Design & Test of Computers.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.