F. De Bernardinis

1.2k total citations
35 papers, 808 citations indexed

About

F. De Bernardinis is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, F. De Bernardinis has authored 35 papers receiving a total of 808 indexed citations (citations by other indexed papers that have themselves been cited), including 27 papers in Electrical and Electronic Engineering, 17 papers in Hardware and Architecture and 12 papers in Biomedical Engineering. Recurrent topics in F. De Bernardinis's work include Analog and Mixed-Signal Circuit Design (12 papers), VLSI and FPGA Design Techniques (11 papers) and Low-power high-performance VLSI design (10 papers). F. De Bernardinis is often cited by papers focused on Analog and Mixed-Signal Circuit Design (12 papers), VLSI and FPGA Design Techniques (11 papers) and Low-power high-performance VLSI design (10 papers). F. De Bernardinis collaborates with scholars based in Italy, United States and Belgium. F. De Bernardinis's co-authors include Alberto Sangiovanni‐Vincentelli, Pierluigi Nuzzo, Pierangelo Terreni, Geert Van der Plas, Marco Sgroi, Luca P. Carloni, Michael I. Jordan, R. Castello, Antonio Liscidini and Marco Sosio and has published in prestigious journals such as Proceedings of the IEEE, IEEE Journal of Solid-State Circuits and IEEE Transactions on Circuits and Systems I Regular Papers.

In The Last Decade

F. De Bernardinis

34 papers receiving 744 citations

Peers

F. De Bernardinis
Tim Tuan United States
Wayne Luk United Kingdom
S. Sheng United States
Alberto Puggelli United States
Anu Gupta India
F. De Bernardinis
Citations per year, relative to F. De Bernardinis F. De Bernardinis (= 1×) peers Ing-Chao Lin

Countries citing papers authored by F. De Bernardinis

Since Specialization
Citations

This map shows the geographic impact of F. De Bernardinis's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by F. De Bernardinis with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites F. De Bernardinis more than expected).

Fields of papers citing papers by F. De Bernardinis

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by F. De Bernardinis. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by F. De Bernardinis. The network helps show where F. De Bernardinis may publish in the future.

Co-authorship network of co-authors of F. De Bernardinis

This figure shows the co-authorship network connecting the top 25 collaborators of F. De Bernardinis. A scholar is included among the top collaborators of F. De Bernardinis based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with F. De Bernardinis. F. De Bernardinis is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Bernardinis, F. De, et al.. (2013). A 40-MHz-to-1-GHz Fully Integrated Multistandard Silicon Tuner in 80-nm CMOS. IEEE Journal of Solid-State Circuits. 48(11). 2746–2761. 30 indexed citations
2.
Fanori, Luca, et al.. (2012). A Dither-Less All Digital PLL for Cellular Transmitters. IEEE Journal of Solid-State Circuits. 47(8). 1908–1920. 38 indexed citations
3.
Bernardinis, F. De, et al.. (2012). A 40MHz-to-1GHz fully integrated multistandard silicon tuner in 80nm CMOS. 162–164. 7 indexed citations
4.
Fanori, Luca, et al.. (2011). A dither-less all digital PLL for cellular transmitters. 1–8. 9 indexed citations
5.
Nuzzo, Pierluigi, et al.. (2010). A Platform-Based Methodology for System-Level Mixed-Signal Design. EURASIP Journal on Embedded Systems. 2010. 1–14. 3 indexed citations
6.
Nuzzo, Pierluigi, F. De Bernardinis, Pierangelo Terreni, & Geert Van der Plas. (2008). Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures. IEEE Transactions on Circuits and Systems I Regular Papers. 55(6). 1441–1454. 220 indexed citations
7.
Nuzzo, Pierluigi, Geert Van der Plas, F. De Bernardinis, et al.. (2006). A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18μm CMOS with 5.8GHz ERBW. 873–873. 22 indexed citations
8.
Rabaey, Jan M., F. De Bernardinis, Ali M. Niknejad, Borivoje Nikolić, & Alberto Sangiovanni‐Vincentelli. (2006). Embedding Mixed-Signal Design in Systems-on-Chip. Proceedings of the IEEE. 94(6). 1070–1088. 20 indexed citations
9.
Nuzzo, Pierluigi, F. De Bernardinis, & Pierangelo Terreni. (2006). Efficient Polynomial Inversion for the Linearization of Pipeline ADCs. CINECA IRIS Institutial research information system (University of Pisa). 313–316. 3 indexed citations
10.
Bernardinis, F. De, Pierluigi Nuzzo, & Alberto Sangiovanni‐Vincentelli. (2006). Robust system level design with analog platforms. Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design. 334–334. 8 indexed citations
11.
Nuzzo, Pierluigi, F. De Bernardinis, Pierangelo Terreni, & Geert Van der Plas. (2006). Efficient Calibration through Statistical Behavioral Modeling of a High-Speed Low-Power ADC. CINECA IRIS Institutial research information system (University of Pisa). 297–300. 13 indexed citations
12.
Nuzzo, Pierluigi, F. De Bernardinis, & Alberto Sangiovanni‐Vincentelli. (2006). Platform-based mixed signal design: Optimizing a high-performance pipelined ADC. Analog Integrated Circuits and Signal Processing. 49(3). 343–358. 8 indexed citations
13.
Bernardinis, F. De, et al.. (2006). A low-power mixed-signal baseband system design for wireless sensor networks. 54–57. 2 indexed citations
14.
Bernardinis, F. De, et al.. (2005). Efficient analog platform characterization through analog constraint graphs. 415–421. 4 indexed citations
15.
Sangiovanni‐Vincentelli, Alberto, Luca P. Carloni, F. De Bernardinis, & Marco Sgroi. (2004). Benefits and challenges for platform-based design. 409–414. 104 indexed citations
16.
Bernardinis, F. De & Alberto Sangiovanni‐Vincentelli. (2004). A methodology for system-level analog design space exploration. Proceedings Design, Automation and Test in Europe Conference and Exhibition. 676–677. 10 indexed citations
17.
Bernardinis, F. De, et al.. (2003). Support vector machines for analog circuit performance representation. 18 indexed citations
18.
Sgroi, Marco, et al.. (2002). Designing wireless protocols: methodology and applications. 6. 3726–3729. 17 indexed citations
19.
Bernardinis, F. De, et al.. (2002). A single-chip 1,200 sinusoid real-time generator for additive synthesis of musical signals. 1. 427–430. 1 indexed citations
20.
Sgroi, Marco, et al.. (2000). Wireless protocols design. 147–151. 7 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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