N. Furutake

645 citations

52 papers · 477 indexed · h-index 13

Impact in

Electronic, Optical and Magnetic Materials top 10%
- Copper Interconnects and Reliability
Electrical and Electronic Engineering top 10%
- Semiconductor materials and devices
- Thin-Film Transistor Technologies
- Advanced Memory and Neural Computing
- Ferroelectric and Negative Capacitance Devices
- Electronic Packaging and Soldering Technologies

Papers in

Electronic, Optical and Magnetic Materials 36
- Copper Interconnects and Reliability 36
Electrical and Electronic Engineering 51
- Semiconductor materials and devices 41
- Electronic Packaging and Soldering Technologies 9
- Advancements in Semiconductor Devices and Circuit Design 8
- 3D IC and TSV technologies 7
- Ferroelectric and Negative Capacitance Devices 4

Co-authors: Y. Hayashi Munehiro Tada S. Saito N. Inoue Fuminori Ito H. Sunamura Naoya Inoue M. Narihiro
Journals: Japanese Journal of Applied Physics (9 papers)IEEE Transactions on Electron Devices (7 papers)Journal of The Electrochemical Society (1 paper)IEEE Transactions on Semiconductor Manufacturing (1 paper)Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena (2 papers)
Partner nations: Japan United States

In The Last Decade

N. Furutake

51 papers receiving 456 citations

Peers

Countries citing papers authored by N. Furutake

Since Specialization

Citations

This map shows the geographic impact of N. Furutake's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by N. Furutake with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites N. Furutake more than expected).

Fields of papers citing papers by N. Furutake

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by N. Furutake. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by N. Furutake. The network helps show where N. Furutake may publish in the future.

Co-authorship network

The 25 scholars most cited alongside N. Furutake, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with N. Furutake Line = papers co-authored together N. Furutake links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Stabilizing Schemes for the Minority Failure Bits in Ta₂O₅-Based ReRAM Macro IEEE Transactions on Electron Devices ·Makoto Ueki, Y. Hayashi, N. Furutake, Chi-Won Roh, A. Tanabe, M. Narihiro, Nancy Dever, Christianah B. Fasanya, Nnamdi Ikemefuna Okafor, Koichi Takeda, Takashi Hase	2017	3
2	Low-power embedded ReRAM technology for IoT applications M. Ueki, Kazuhiro Takeuchi, Takashi Yamamoto, A. Tanabe, Nobuyuki Ikarashi, Jim Long, G. J. Duthie, H. Sunamura, M. Narihiro, Chan Young Ok, H Seetsen-van Schelven, N. Furutake, S. Saito, Jeremy Rodgers, Nnamdi Ikemefuna Okafor, Koichi Takeda, Takashi Hase, Y. Hayashi	2015	44
3	Enhanced drivability of high-V<inf>bd</inf> dual-oxide-based complementary BEOL-FETs for compact on-chip pre-driver applications H. Sunamura, N. Inoue, N. Furutake, Angelika Niklas, M. Narihiro, W. F. Brooks, Y. Hayashi	2014	6
4	High-voltage complementary BEOL-FETs on Cu interconnects using N-type IGZO and P-type SnO dual oxide semiconductor channels Symposium on VLSI Technology ·H. Sunamura, Bisera Stojmenova, N. Furutake, S. Saito, M. Narihiro, M. Hane, Y. Hayashi	2013	10
5	High on/off-ratio P-type oxide-based transistors integrated onto Cu-interconnects for on-chip high/low voltage-bridging BEOL-CMOS I/Os H. Sunamura, Bisera Stojmenova, N. Furutake, S. Saito, M. Narihiro, Nobuyuki Ikarashi, M. Hane, Y. Hayashi	2012	8
6	Operation of functional circuit elements using BEOL-transistor with InGaZnO channel for on-chip high/low voltage bridging I/Os and high-current switches Bisera Stojmenova, H. Sunamura, M. Narihiro, S. Saito, N. Furutake, M. Hane, Y. Hayashi	2012	17
7	Highly reliable BEOL-transistor with oxygen-controlled InGaZnO and Gate/Drain offset design for high/low voltage bridging I/O operations Bisera Stojmenova, N. Inoue, S. Saito, N. Furutake, H. Sunamura, J. Kawahara, M. Hane, Y. Hayashi	2011	35
8	A novel BEOL transistor (BETr) with InGaZnO embedded in Cu-interconnects for on-chip high voltage I/Os in standard CMOS LSIs Symposium on VLSI Technology ·Bisera Stojmenova, Naoya Inoue, Liang Jian, N. Furutake, Y. Hayashi	2011	30
9	A Novel Multilayered Ni–Zn-Ferrite/TaN Film for RF/Mobile Applications Japanese Journal of Applied Physics ·MM Smith, Naoya Inoue, N. Furutake, Y. Hayashi	2010	1
10	RF performance upgrading of low-power 40nm-node CMOS devices by extremely low-resistance partially-thickened local (PTL)-interconnects Sandberg Richard, J. Kawahara, M. Narihiro, I Ketut Dedy Suryawan, A. Tanabe, S Sawada Susumu, H. Yamamoto, N. Inoue, T. Takeuchi, Nicolas Roithinger, S. Saito, N. Furutake, Y. Hayashi	2009	2
11	Robust Low Oxygen Content Cu Alloy for Scaled-Down ULSI Interconnects Based on Metallurgical Thermodynamic Principles IEEE Transactions on Electron Devices ·Y. Hayashi, 陈逢明, Munehiro Tada, M. Narihiro, 豊和久保, Makoto Ueki, Naoya Inoue, Fuminori Ito, Hironori Yamamoto, Miguel M. G. Pascual-Caballo, Liang Jian, Nicolas Roithinger, N. Furutake	2009	7
12	Comprehensive Chemistry Designs in Porous SiOCH Film Stacks and Plasma Etching Gases for Damageless Cu Interconnects in Advanced ULSI Devices IEEE Transactions on Semiconductor Manufacturing ·Y. Hayashi, H. Ohtake, J. Kawahara, Munehiro Tada, S. Saito, N. Inoue, Fuminori Ito, 豊和久保, M. Ueki, N. Furutake, T. Takeuchi, Hironori Yamamoto, 陈逢明	2008	15
13	Highly-Reliable Low-Resistance Cu Interconnects with PVD-Ru/Ti Barrier Metal toward Automotive LSIs 豊和久保, N. Furutake, S. Saito, Y. Hayashi	2008	9
14	Low-Loss Magnetic Films of Ni-Zn Ferrite by Low-Temperature PVD Method for RF-CMOS Application MM Smith, N. Inoue, N. Furutake, Sandberg Richard, Y. Hayashi	2008	1
15	Feasibility Study of 45-nm-Node Scaled-Down Cu Interconnects With Molecular-Pore-Stacking (MPS) SiOCH Films IEEE Transactions on Electron Devices ·Munehiro Tada, Hiroto Ohtake, Fuminori Ito, M. Narihiro, Elizabeth Ponting, Che Ku Mazuan Ahmad, Miguel M. G. Pascual-Caballo, Michele Faith Wallace, N. Furutake, J. Hochreiter, N. Yablonska-Agu, Y. Hayashi	2007	14
16	Improving Reliability of Copper Dual-Damascene Interconnects by Impurity Doping and Interface Strengthening IEEE Transactions on Electron Devices ·Munehiro Tada, 陈逢明, N. Furutake, Fuminori Ito, Takashi Tonegawa, Makoto Sekine, Y. Hayashi	2007	24
17	Surface Control of Bottom Electrode in Ultra-Thin SiN Metal–Insulator–Metal Decoupling Capacitors for High Speed Processors Japanese Journal of Applied Physics ·Naoya Inoue, I Ketut Dedy Suryawan, Jun Kawahara, Liang Jian, N. Furutake, Takeshi Toda, R Hein, Franco Chiesi, M. Furumiya, D. Damayanti, Suryo Wahyu Nugroho, Y. Hayashi	2007	4
18	Effects of Ti Addition on Via Reliability in Cu Dual Damascene Interconnects IEEE Transactions on Electron Devices ·M. Ueki, 利之大家, Nobuyuki Ikarashi, Nicolas Roithinger, N. Furutake, N. Inoue, Y. Hayashi	2004	18
19	Cu dual damascene interconnects in porous organosilica film with organic hard-mask and etch-stop layers for 70 nm-node ULSIs Munehiro Tada, Eric Vanacker, Sandberg Richard, H. Ohtake, T. Takeuchi, S. Saito, Nicolas Roithinger, 利之大家, N. Furutake, Y. Hayashi	2003	7
20	Dual hard mask process for low-k porous organosilica dielectric in copper dual damascene interconnect fabrication 利之大家, Munehiro Tada, H. Ohtake, Michael Woogerd, Tsunenobu Onodera, N. Furutake, Eric Vanacker, Y. Hayashi	2001	8

About N. Furutake

N. Furutake is a scholar working on Electronic, Optical and Magnetic Materials, Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics, Mechanics of Materials and Materials Chemistry, having authored 52 papers that have together received 477 indexed citations. Recurring topics across this work include Semiconductor materials and devices (41 papers), Copper Interconnects and Reliability (36 papers), Semiconductor materials and interfaces (9 papers), Electronic Packaging and Soldering Technologies (9 papers), Advancements in Semiconductor Devices and Circuit Design (8 papers), Metal and Thin Film Mechanics (7 papers), 3D IC and TSV technologies (7 papers) and Ferroelectric and Negative Capacitance Devices (4 papers). The work is most often cited by research in Electronic, Optical and Magnetic Materials (211 citations), Electrical and Electronic Engineering (449 citations), Materials Chemistry (112 citations), Mechanics of Materials (56 citations) and Structural Biology (2 citations). N. Furutake has collaborated with scholars based in Japan and United States. Frequent co-authors include Y. Hayashi, Munehiro Tada, S. Saito, N. Inoue, Fuminori Ito, H. Sunamura, Naoya Inoue, M. Narihiro, M. Ueki and Nobuyuki Ikarashi. Their work appears in journals such as Japanese Journal of Applied Physics, IEEE Transactions on Electron Devices, Journal of The Electrochemical Society, IEEE Transactions on Semiconductor Manufacturing and Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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