J.M. Portal

1.0k total citations
58 papers, 671 citations indexed

About

J.M. Portal is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, J.M. Portal has authored 58 papers receiving a total of 671 indexed citations (citations by other indexed papers that have themselves been cited), including 53 papers in Electrical and Electronic Engineering, 30 papers in Hardware and Architecture and 4 papers in Computer Networks and Communications. Recurrent topics in J.M. Portal's work include VLSI and Analog Circuit Testing (27 papers), Integrated Circuits and Semiconductor Failure Analysis (23 papers) and Semiconductor materials and devices (19 papers). J.M. Portal is often cited by papers focused on VLSI and Analog Circuit Testing (27 papers), Integrated Circuits and Semiconductor Failure Analysis (23 papers) and Semiconductor materials and devices (19 papers). J.M. Portal collaborates with scholars based in France, Spain and United States. J.M. Portal's co-authors include M. Renovell, Y. Zorian, Joan Figueras, H. Aziza, Jacques‐Olivier Klein, E. Nowak, Christophe Müller, Véronique Kazpard, Marc Bocquet and Céline Frochot and has published in prestigious journals such as Water Research, Journal of Non-Crystalline Solids and Electronics Letters.

In The Last Decade

J.M. Portal

55 papers receiving 632 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
J.M. Portal France 15 574 409 50 33 32 58 671
Masaru Oya Japan 11 250 0.4× 262 0.6× 15 0.3× 88 2.7× 78 2.4× 45 469
Fadi H. Gebara United States 10 237 0.4× 54 0.1× 19 0.4× 44 1.3× 18 0.6× 30 428
Jinwen Li China 13 182 0.3× 81 0.2× 11 0.2× 2 0.1× 18 0.6× 41 384
Chi‐Shi Chen Taiwan 8 76 0.1× 35 0.1× 10 0.2× 2 0.1× 16 0.5× 30 314
Sining Wu China 10 108 0.2× 9 0.0× 49 1.0× 28 0.8× 21 0.7× 29 295
Tianhao Zheng China 10 99 0.2× 96 0.2× 3 0.1× 3 0.1× 13 0.4× 12 323
Gildas Léger Spain 12 348 0.6× 194 0.5× 45 1.4× 20 0.6× 55 430
Eui‐Suk Jung South Korea 9 199 0.3× 6 0.0× 44 0.9× 3 0.1× 17 0.5× 59 321

Countries citing papers authored by J.M. Portal

Since Specialization
Citations

This map shows the geographic impact of J.M. Portal's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J.M. Portal with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J.M. Portal more than expected).

Fields of papers citing papers by J.M. Portal

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J.M. Portal. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J.M. Portal. The network helps show where J.M. Portal may publish in the future.

Co-authorship network of co-authors of J.M. Portal

This figure shows the co-authorship network connecting the top 25 collaborators of J.M. Portal. A scholar is included among the top collaborators of J.M. Portal based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J.M. Portal. J.M. Portal is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Billoint, Olivier, et al.. (2025). Dual-Mode 16kb Memory: Transforming a Ferroelectric Capacitor Bitcell into Resistive Filamentary Memory. SPIRE - Sciences Po Institutional REpository. 1–4.
2.
Hirtzlin, Tifenn, Elisa Vianello, Jacques Droulez, et al.. (2023). Energy-Efficient Bayesian Inference Using Near-Memory Computation with Memristors. HAL AMU. 1–2. 2 indexed citations
3.
4.
Noël, Jean-Philippe, et al.. (2020). Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing. HAL (Le Centre pour la Communication Scientifique Directe). 1187–1192. 3 indexed citations
5.
Portal, J.M., et al.. (2012). Current density aware algorithm for net generation in analog high current application. 153–156. 2 indexed citations
6.
Portal, J.M., et al.. (2012). Threshold voltage asymmetric degradation on octagonal MOSFET during HCI stress. Electronics Letters. 48(14). 879–881. 3 indexed citations
7.
8.
Portal, J.M., et al.. (2008). A High-Speed Structural Method for Testing Address Decoder Faults in Flash Memories. 1–10. 3 indexed citations
9.
Portal, J.M., et al.. (2006). MM11 Based Flash Memory Cell Model Including Characterization Procedure. HAL (Le Centre pour la Communication Scientifique Directe). 6 indexed citations
10.
Kazpard, Véronique, Bruno Lartiges, Céline Frochot, et al.. (2006). Fate of coagulant species and conformational effects during the aggregation of a model of a humic substance with Al13 polycations. Water Research. 40(10). 1965–1974. 70 indexed citations
11.
Aziza, H., et al.. (2006). Speeding up simulation time in EEPROM memory designs. 285–288. 1 indexed citations
12.
Portal, J.M., et al.. (2005). Analyzing bridging faults impact on EEPROM cell array. 3–8. 1 indexed citations
13.
Portal, J.M., et al.. (2004). DES-SRAM IP-core: a SRAM embedding DES feature [secure SoC applications]. 2. 11–14. 2 indexed citations
14.
Portal, J.M., et al.. (2004). EEPROM memory: threshold voltage built in self diagnosis. 1. 23–28. 4 indexed citations
15.
Renovell, M., J.M. Portal, Joan Figueras, & Y. Zorian. (2003). Testing the configurable interconnect/logic interface of SRAM-based FPGA's. 618–622. 4 indexed citations
16.
Renovell, M., et al.. (2002). IS-FPGA : a new symmetric FPGA architecture with implicit scan. 924–931. 35 indexed citations
17.
Renovell, M., et al.. (2001). A Discussion on Test Pattern Generation for FPGA—Implemented Circuits. Journal of Electronic Testing. 17(3-4). 283–290. 2 indexed citations
18.
Renovell, M., et al.. (2000). Some Experiments in Test Pattern Generation for FPGA-Implemented Combinational Circuits. 3–8. 3 indexed citations
19.
Renovell, M., J.M. Portal, Joan Figueras, & Y. Zorian. (1999). Testing the configurable interconnect/logic interface of SRAM-based FPGA's. 122–122. 14 indexed citations
20.
Renovell, M., J.M. Portal, Joan Figueras, & Y. Zorian. (1999). SRAM-Based FPGAs: Testing the Embedded RAM Modules. Journal of Electronic Testing. 14(1-2). 159–167. 38 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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