S.H. Dhong

812 citations

38 papers · 477 · h-index 13

Impact in

Hardware and Architecture top 2%
- Parallel Computing and Optimization Techniques
- Embedded Systems Design Techniques
- VLSI and Analog Circuit Testing
Electrical and Electronic Engineering top 10%
- Low-power high-performance VLSI design
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices

Papers in

Electrical and Electronic Engineering 34
- Low-power high-performance VLSI design 21
- Advancements in Semiconductor Devices and Circuit Design 11
- Semiconductor materials and devices 11
- VLSI and FPGA Design Techniques 6
Hardware and Architecture 20
- Parallel Computing and Optimization Techniques 12
- VLSI and Analog Circuit Testing 7
- Embedded Systems Design Techniques 4

Co-authors: Osamu Takahashi (18 shared papers)H. Peter Hofstee (7 shared papers)J. A. Silberman (9 shared papers)Hwa-Joon Oh (6 shared papers)Silvia Melitta Mueller (4 shared papers)B. Flachs (7 shared papers)T. Van Duzer (3 shared papers)J. Leenstra (2 shared papers)
Journals: IEEE Journal of Solid-State Circuits (10 papers)IEEE Transactions on Electron Devices (2 papers)IBM Journal of Research and Development (2 papers)IEEE Micro (2 papers)Journal of Applied Physics (1 paper)
Partner nations: United States Japan Germany

In The Last Decade

S.H. Dhong

36 papers receiving 439 citations

Peers

Countries citing papers authored by S.H. Dhong

Since Specialization

Citations

This map shows the geographic impact of S.H. Dhong's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S.H. Dhong with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S.H. Dhong more than expected).

Fields of papers citing papers by S.H. Dhong

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S.H. Dhong. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S.H. Dhong. The network helps show where S.H. Dhong may publish in the future.

Co-authors

The 25 scholars most cited alongside S.H. Dhong, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with S.H. Dhong Line = papers co-authored together S.H. Dhong links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 38 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	A streaming processing unit for a CELL processor B. Flachs, S. Asano, S.H. Dhong, H. Peter Hofstee, G. Gervais, R. Kim, T. Le, P. Liu, J. Leenstra, J. S. Liberty, B. Michael, Hwa-Joon Oh, Silvia Melitta Mueller, Osamu Takahashi, A. Hatakeyama, Yukio Watanabe, N. Yano	2005	93
2	A Fully Pipelined Single-Precision Floating-Point Unit in the Synergistic Processor Element of a CELL Processor IEEE Journal of Solid-State Circuits ·Hwa-Joon Oh, Silvia Melitta Mueller, Christian Jacobi, B.W. Michael, Hiroaki Nishikawa, Y. Totsuka, T. Namatame, N. Yano, Toichi Machida, S.H. Dhong	2006	45
3	The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor Silvia Melitta Mueller, Christian Jacobi, Hwa-Joon Oh, Khoa Dac Tran, S. Cottier, B.W. Michael, Hiroaki Nishikawa, Y. Totsuka, T. Namatame, N. Yano, Toichi Machida, S.H. Dhong	2005	33
4	A 4.8GHz fully pipelined embedded SRAM in the streaming processor of a CELL processor S.H. Dhong, Osamu Takahashi, M. White, T. Asano, Tomoharu Nakazato, J. A. Silberman, Atsushi Kawasumi, H. Yoshihara	2005	31
5	A 1 GHz single-issue 64 b PowerPC processor H. Peter Hofstee, N. Aoki, D. Boerstler, P. Coulman, S.H. Dhong, B. Flachs, N. Kojima, Oh‐Young Kwon, K. Lee, David J. Meltzer, Kevin Nowka, J. Park, Jean-Luc Peter, S. Posluszny, Michael W. Shapiro, J. A. Silberman, Osamu Takahashi, B. Weinberger	2002	27
6	Custom circuit design as a driver of microprocessor performance IBM Journal of Research and Development ·D.H. Allen, S.H. Dhong, H. Peter Hofstee, J. Leenstra, Kevin Nowka, D. Stasiak, D. Wendel	2000	24
7	Design methodology for a 1.0 GHz microprocessor S. Posluszny, N. Aoki, D. Boerstler, J.I. Burns, S.H. Dhong, U. Ghoshal, H. Peter Hofstee, David P. LaPotin, K. Lee, David J. Meltzer, Hùng Ngô, Kevin Nowka, J. A. Silberman, Osamu Takahashi, Ivan Vo	2002	24
8	High-speed sensing scheme for CMOS DRAMs IEEE Journal of Solid-State Circuits ·S.H. Dhong, Nicky Lu, (unknown), S. Parke	1988	15
9	Power-Conscious Design of the CELL Processor's Synergistic Processor Element IEEE Micro ·Osamu Takahashi, S. Cottier, S.H. Dhong, B. Flachs, J. A. Silberman	2005	14
10	A 22-ns 1-Mbit CMOS high-speed DRAM with address multiplexing IEEE Journal of Solid-State Circuits ·Nicky Lu, G. Bronner, Koji Kitamura, R.E. Scheuerlein, W.H. Henkels, S.H. Dhong, Y. Katayama, T. Kirihata, H. Niijima, R. Franch, W. Wang, Michiru Nishiwaki, F. L. Pesavento, T.V. Rajeevakumar, Y. Sakaue, Yuya Suzuki, Yusuke Iguchi, Edgar Toshiro Yano	1989	14
11	The circuits and physical design of the synergistic processor element of a CELL processor Osamu Takahashi, R. Cook, S. Cottier, S.H. Dhong, B. Flachs, Koji Hirairi, Atsushi Kawasumi, Hiroaki Murakami, H. Murakami, H. Noro, Hwa-Joon Oh, S. Onishi, J. Pille, J. Silberman, Shanshan Yong	2005	13
12	Minimum-width control-current pulse for Josephson logic gates IEEE Transactions on Electron Devices ·S.H. Dhong, T. Van Duzer	1980	12
13	Low-Power Design Approach of 11FO4 256-Kbyte Embedded SRAM for the Synergistic Processor Element of a Cell Processor IEEE Micro ·T. Asano, J. A. Silberman, S.H. Dhong, Osamu Takahashi, M. White, S. Cottier, Tomoharu Nakazato, Atsushi Kawasumi, H. Yoshihara	2005	12
14	Josephson analog-to-digital converter using self-gating-AND circuits as comparators IEEE Transactions on Magnetics ·S.H. Dhong, R. Jewett, T. Van Duzer	1983	11
15	A 14-ns 14-Mb CMOS DRAM with 300-mW active power IEEE Journal of Solid-State Circuits ·T. Kirihata, S.H. Dhong, Koji Kitamura, T. Sunaga, Y. Katayama, R.E. Scheuerlein, Akashi Satoh, Y. Sakaue, Keiji Tobimatsu, Kohji Hosokawa, Takashi Saitoh, Takefumi Yoshikawa, Hiroyuki Hashimoto, M. Kazusawa	1992	11
16	“Timing closure by design,” a high frequency microprocessor design methodology S. Posluszny, K. Lee, David J. Meltzer, Kevin Nowka, Jongho Park, Jean-Luc Peter, J. A. Silberman, Osamu Takahashi, Paul G. Villarrubia, N. Aoki, D. Boerstler, P. Coulman, S.H. Dhong, B. Flachs, H. Peter Hofstee, N. Kojima, Oh‐Min Kwon	2000	11
17	Design and characteristics of a lightly doped drain (LDD) device fabricated with self-aligned titanium disilicide IEEE Transactions on Electron Devices ·Fang-Shi J. Lai, J.Y.-C. Sun, S.H. Dhong	1986	10
18	Self resetting logic register and incrementer R.A. Haring, M. Milshtein, T.I. Chappell, S.H. Dhong, B.A. Chappell	2002	9
19	1-GHz fully pipelined 3.7-ns address access time 8 k/spl times/1024 embedded synchronous DRAM macro IEEE Journal of Solid-State Circuits ·Osamu Takahashi, S.H. Dhong, Masaru Ohkubo, S. Onishi, R.H. Dennard, R. Hannon, S. Crowder, Shankar S. Iyer, M.R. Wordeman, B. Davari, W.B. Weinberger, N. Aoki	2000	8
20	Circuit Design Techniques for a First-Generation Cell Broadband Engine Processor IEEE Journal of Solid-State Circuits ·J. Warnock, D. Wendel, T. Aipperspach, E. Behnen, Robert A. Cordes, S.H. Dhong, Koji Hirairi, Hiroaki Murakami, S. Onishi, D. Pham, J. Pille, S. Posluszny, Osamu Takahashi, Huajun Wen	2006	8

About S.H. Dhong

S.H. Dhong is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Biomedical Engineering, Computer Networks and Communications and Signal Processing, having authored 38 papers that have together received 477 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (21 papers), Parallel Computing and Optimization Techniques (12 papers), Advancements in Semiconductor Devices and Circuit Design (11 papers), Semiconductor materials and devices (11 papers), VLSI and Analog Circuit Testing (7 papers), Analog and Mixed-Signal Circuit Design (7 papers), VLSI and FPGA Design Techniques (6 papers) and Embedded Systems Design Techniques (4 papers). The work is most often cited by research in Hardware and Architecture (258 citations), Electrical and Electronic Engineering (331 citations), Computational Theory and Mathematics (81 citations), Computer Networks and Communications (114 citations) and Signal Processing (42 citations). S.H. Dhong has collaborated with scholars based in United States, Japan and Germany. Frequent co-authors include Osamu Takahashi, H. Peter Hofstee, J. A. Silberman, Hwa-Joon Oh, Silvia Melitta Mueller, B. Flachs, T. Van Duzer, J. Leenstra, Christian Jacobi and Hiroaki Nishikawa. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices, IBM Journal of Research and Development, IEEE Micro and Journal of Applied Physics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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S.H. Dhong

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