G. Gerosa

764 total citations
17 papers, 496 citations indexed

About

G. Gerosa is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, G. Gerosa has authored 17 papers receiving a total of 496 indexed citations (citations by other indexed papers that have themselves been cited), including 17 papers in Electrical and Electronic Engineering, 10 papers in Hardware and Architecture and 4 papers in Computer Networks and Communications. Recurrent topics in G. Gerosa's work include Low-power high-performance VLSI design (9 papers), Parallel Computing and Optimization Techniques (8 papers) and Interconnection Networks and Systems (4 papers). G. Gerosa is often cited by papers focused on Low-power high-performance VLSI design (9 papers), Parallel Computing and Optimization Techniques (8 papers) and Interconnection Networks and Systems (4 papers). G. Gerosa collaborates with scholars based in United States. G. Gerosa's co-authors include H. Sanchez, J. Alvarez, C. Dietz, J. Eno, Steven H. Voldman, J. Kahle, M. Alexander, Thomas J. Olson, S. Furkay and Bo Jiang and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Design & Test of Computers.

In The Last Decade

G. Gerosa

15 papers receiving 459 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
G. Gerosa United States 8 428 199 107 75 25 17 496
C. Svensson Sweden 7 362 0.8× 202 1.0× 51 0.5× 122 1.6× 19 0.8× 14 418
D. Dobberpuhl United States 5 411 1.0× 346 1.7× 121 1.1× 193 2.6× 17 0.7× 8 567
Kaijian Shi United States 6 386 0.9× 198 1.0× 61 0.6× 72 1.0× 21 0.8× 14 433
Uming Ko United States 10 395 0.9× 158 0.8× 117 1.1× 58 0.8× 44 1.8× 20 438
Joshua Friedrich United States 8 330 0.8× 209 1.1× 57 0.5× 76 1.0× 14 0.6× 13 391
S. Santhanam United States 3 410 1.0× 378 1.9× 112 1.0× 223 3.0× 16 0.6× 3 586
Richard T. Witek United States 6 424 1.0× 406 2.0× 114 1.1× 248 3.3× 18 0.7× 13 632
N. James United States 9 483 1.1× 289 1.5× 60 0.6× 66 0.9× 10 0.4× 10 522
M.K. Gowan United States 7 472 1.1× 367 1.8× 36 0.3× 186 2.5× 13 0.5× 9 597
C. Dietz United States 6 250 0.6× 139 0.7× 71 0.7× 42 0.6× 26 1.0× 7 290

Countries citing papers authored by G. Gerosa

Since Specialization
Citations

This map shows the geographic impact of G. Gerosa's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by G. Gerosa with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites G. Gerosa more than expected).

Fields of papers citing papers by G. Gerosa

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by G. Gerosa. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by G. Gerosa. The network helps show where G. Gerosa may publish in the future.

Co-authorship network of co-authors of G. Gerosa

This figure shows the co-authorship network connecting the top 25 collaborators of G. Gerosa. A scholar is included among the top collaborators of G. Gerosa based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with G. Gerosa. G. Gerosa is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

17 of 17 papers shown
1.
Gerosa, G., et al.. (2009). A Sub-2 W Low Power IA Processor for Mobile Internet Devices in 45 nm High-k Metal Gate CMOS. IEEE Journal of Solid-State Circuits. 44(1). 73–82. 32 indexed citations
2.
Gerosa, G., et al.. (2008). A 512-KB level-2 cache design in 45-nm for low power IA processor silverthorne. 403–406. 1 indexed citations
3.
Alvarez, J., et al.. (2005). A Wide-Bandwidth Low-Voltage Pll for Powerpc Microprocessors. 37–38. 1 indexed citations
4.
5.
Sanchez, H., Ivan Vo, Wen Wang, et al.. (2002). A 200 MHz 2.5 V 4 W superscalar RISC microprocessor. 218–219,. 6 indexed citations
6.
Sanchez, H., et al.. (2002). Thermal management system for high performance PowerPC/sup TM/ microprocessors. 325–330. 77 indexed citations
7.
Dietz, C., et al.. (2002). The PowerPC 603 microprocessor: a low-power design for portable applications. 307–315. 6 indexed citations
8.
9.
Reed, P.A.S., M. Alexander, J. Alvarez, et al.. (2002). A 250 MHz 5 W RISC microprocessor with on-chip L2 cache controller. 412–413,. 6 indexed citations
10.
11.
Gerosa, G., M. Alexander, J. Alvarez, et al.. (1997). A 250-MHz 5-W PowerPC microprocessor with on-chip L2 cache controller. IEEE Journal of Solid-State Circuits. 32(11). 1635–1649. 18 indexed citations
12.
13.
Alvarez, J., et al.. (1995). A wide-bandwidth low-voltage PLL for PowerPC microprocessors. IEEE Journal of Solid-State Circuits. 30(4). 383–391. 55 indexed citations
14.
Gerosa, G., C. Dietz, J. Alvarez, et al.. (1994). A 2.2 W, 80 MHz superscalar RISC microprocessor. IEEE Journal of Solid-State Circuits. 29(12). 1440–1454. 181 indexed citations
15.
Gerosa, G., et al.. (1994). PowerPC 603, a microprocessor for portable computers. IEEE Design & Test of Computers. 11(4). 14–23. 39 indexed citations
16.
Gerosa, G., et al.. (1985). A high performance CMOS technology for 256K/1MB EPROMs. 631–634. 3 indexed citations
17.
Gerosa, G., et al.. (1983). IIIB-2 quantification of photon generation in CMOS VLSI structures. IEEE Transactions on Electron Devices. 30(11). 1580–1581. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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