C. Thomas Gray

1.6k total citations
55 papers, 1.1k citations indexed

About

C. Thomas Gray is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, C. Thomas Gray has authored 55 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 49 papers in Electrical and Electronic Engineering, 13 papers in Hardware and Architecture and 8 papers in Computer Networks and Communications. Recurrent topics in C. Thomas Gray's work include Low-power high-performance VLSI design (16 papers), Advancements in PLL and VCO Technologies (11 papers) and Semiconductor Lasers and Optical Devices (10 papers). C. Thomas Gray is often cited by papers focused on Low-power high-performance VLSI design (16 papers), Advancements in PLL and VCO Technologies (11 papers) and Semiconductor Lasers and Optical Devices (10 papers). C. Thomas Gray collaborates with scholars based in United States, United Kingdom and Canada. C. Thomas Gray's co-authors include William J. Dally, Stephen G. Tell, Brian Zimmer, Ralph K. Cavin, Brucek Khailany, John W. Poulton, Rangharajan Venkatesan, Ben Keller, Wentai Liu and John Wilson and has published in prestigious journals such as Communications of the ACM, IEEE Journal of Solid-State Circuits and Journal of Lightwave Technology.

In The Last Decade

C. Thomas Gray

48 papers receiving 1.0k citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
C. Thomas Gray 864 350 196 181 144 55 1.1k
Matthew Fojtik 1.0k 1.2× 485 1.4× 223 1.1× 253 1.4× 123 0.9× 32 1.3k
Stephen G. Tell 628 0.7× 302 0.9× 191 1.0× 197 1.1× 155 1.1× 41 934
Ben Keller 660 0.8× 385 1.1× 232 1.2× 163 0.9× 154 1.1× 28 941
Brian Zimmer 845 1.0× 416 1.2× 262 1.3× 195 1.1× 188 1.3× 49 1.2k
Mahmut E. Sinangil 1.3k 1.5× 388 1.1× 182 0.9× 168 0.9× 141 1.0× 34 1.5k
Nathaniel Pinckney 1.0k 1.2× 484 1.4× 253 1.3× 236 1.3× 196 1.4× 44 1.4k
Kazutami Arimoto 595 0.7× 323 0.9× 87 0.4× 215 1.2× 68 0.5× 140 829
Hung-Jen Liao 1.3k 1.5× 345 1.0× 99 0.5× 125 0.7× 137 1.0× 40 1.4k
Jaeha Kung 536 0.6× 223 0.6× 305 1.6× 144 0.8× 230 1.6× 51 827
Farhana Sheikh 616 0.7× 309 0.9× 185 0.9× 149 0.8× 201 1.4× 47 899

Countries citing papers authored by C. Thomas Gray

Since Specialization
Citations

This map shows the geographic impact of C. Thomas Gray's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by C. Thomas Gray with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites C. Thomas Gray more than expected).

Fields of papers citing papers by C. Thomas Gray

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by C. Thomas Gray. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by C. Thomas Gray. The network helps show where C. Thomas Gray may publish in the future.

Co-authorship network of co-authors of C. Thomas Gray

This figure shows the co-authorship network connecting the top 25 collaborators of C. Thomas Gray. A scholar is included among the top collaborators of C. Thomas Gray based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with C. Thomas Gray. C. Thomas Gray is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
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Zimmer, Brian, Stephen G. Tell, & C. Thomas Gray. (2025). A 77 fJ/Bit 8 Gbps Low-Latency Self-Timed Die-to-Die Link for 2.5D and 3D Interconnect in 3nm. 1–3.
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Zhu, Yicheng, Nathan M. Ellis, Sudhir S. Kudva, et al.. (2024). A Compact 48-V-to-Sub-1-V Switching Bus Converter with 4.7-mm Height for Processor Vertical Power Delivery. eScholarship (California Digital Library). 2596–2603. 2 indexed citations
5.
Keller, Ben, Rangharajan Venkatesan, Steve Dai, et al.. (2023). A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm. IEEE Journal of Solid-State Circuits. 58(4). 1129–1141. 30 indexed citations
6.
Mehta, Nandish, Angad Rekhi, Nikola Nedovic, et al.. (2023). A microring resonator-based clock-forwarded DWDM optical interconnect in a monolithic silicon photonics process. IET conference proceedings.. 2023(34). 1496–1499. 2 indexed citations
7.
Keller, Ben, Rangharajan Venkatesan, Steve Dai, et al.. (2022). A 17–95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm. 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 16–17. 27 indexed citations
8.
Mehta, Nandish, et al.. (2022). An On-Chip Relaxation Oscillator in 5-nm FinFET Using a Frequency-Error Feedback Loop. IEEE Journal of Solid-State Circuits. 57(10). 2898–2908. 7 indexed citations
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Zimmer, Brian, Rangharajan Venkatesan, Yakun Sophia Shao, et al.. (2020). A 0.32–128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE Journal of Solid-State Circuits. 55(4). 920–932. 82 indexed citations
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Chen, Xi, John W. Poulton, Nikola Nedovic, et al.. (2019). Voltage-Follower Coupling Quadrature Oscillator with Embedded Phase-Interpolator in 16nm FinFET. 1–4.
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Dally, William J., C. Thomas Gray, John W. Poulton, et al.. (2018). Hardware-Enabled Artificial Intelligence. 3–6. 19 indexed citations
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Sinangil, Mahmut E., et al.. (2014). A reverse write assist circuit for SRAM dynamic write V<inf>MIN</inf> tracking using canary SRAMs. 1–8. 3 indexed citations
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Gray, C. Thomas, et al.. (2003). Transparent factories through industrial internets. 2. 931–936. 2 indexed citations
17.
Gray, C. Thomas, et al.. (2002). A DSP based 10BaseT/100BaseTX Ethernet transceiver in a 1.8 V, 0.18 μm CMOS technology. 135–138. 10 indexed citations
18.
Gray, C. Thomas, et al.. (1994). Circuit delay calculation considering data dependent delays. Integration. 17(1). 1–23. 5 indexed citations
19.
Liu, Wentai, et al.. (1994). A 250-MHz wave pipelined adder in 2-μm CMOS. IEEE Journal of Solid-State Circuits. 29(9). 1117–1128. 32 indexed citations
20.
Gray, C. Thomas, Thomas A. Hughes, S. Arora, Wentai Liu, & Ralph K. Cavin. (1991). Theoretical and Practical Issues in CMOS Wave Pipelining.. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 118(5). 397–409. 24 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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