Brian Richards
- Hardware and Architecture top 1%
- Embedded Systems Design Techniques 11
- Parallel Computing and Optimization Techniques 6
- VLSI and Analog Circuit Testing 4
- Software top 10%
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- Low-power high-performance VLSI design 9
- Advancements in PLL and VCO Technologies 7
- VLSI and FPGA Design Techniques 5
- Radio Frequency Integrated Circuit Design 4
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- Advanced Data Compression Techniques 4
Brian Richards
32 papers receiving 998 citations
Hit Papers
Peers
Comparison fields: 5 of 69
- Hardware and Architecture 656
- Computer Networks and Communications 328
- Computational Mathematics 8
- Software 33
- Electrical and Electronic Engineering 470
Countries citing papers authored by Brian Richards
This map shows the geographic impact of Brian Richards's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Brian Richards with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Brian Richards more than expected).
Fields of papers citing papers by Brian Richards
This network shows the impact of papers produced by Brian Richards. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Brian Richards. The network helps show where Brian Richards may publish in the future.
Co-authorship network
The 25 scholars most cited alongside Brian Richards, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2023 | 1 | |
| 2 | 2021 | 10 | |
| 3 | 2021 | 10 | |
| 4 | 2017 | 7 | |
| 5 | 2016 | 51 | |
| 6 | 2016 | 70 | |
| 7 | 2015 | 25 | |
| 8 | 2015 | 9 | |
| 9 | Chiselbreakdown → | 2012 | 584 |
| 10 | 2010 | 4 | |
| 11 | 2010 | 2 | |
| 12 | 2007 | 21 | |
| 13 | 2007 | 3 | |
| 14 | 2006 | 29 | |
| 15 | 2006 | 1 | |
| 16 | 1997 | 9 | |
| 17 | 1996 | 11 | |
| 18 | 1995 | 3 | |
| 19 | 1995 | 17 | |
| 20 | 1991 | 72 |
About Brian Richards
Brian Richards is a scholar working on Hardware and Architecture, Signal Processing, Electrical and Electronic Engineering, Management of Technology and Innovation and Computer Vision and Pattern Recognition, having authored 35 papers that have together received 1.1k indexed citations. Recurring topics across this work include Embedded Systems Design Techniques (11 papers), Low-power high-performance VLSI design (9 papers), Advancements in PLL and VCO Technologies (7 papers), Parallel Computing and Optimization Techniques (6 papers), VLSI and FPGA Design Techniques (5 papers), Radio Frequency Integrated Circuit Design (4 papers), VLSI and Analog Circuit Testing (4 papers) and Advanced Data Compression Techniques (4 papers). The work is most often cited by research in Hardware and Architecture (656 citations), Computer Networks and Communications (328 citations), Computational Mathematics (8 citations), Software (33 citations) and Electrical and Electronic Engineering (470 citations). Brian Richards has collaborated with scholars based in United States, France and Spain. Frequent co-authors include Krste Asanović, Yunsup Lee, Rimas Avižienis, Andrew Waterman, Jonathan Bachrach, John Wawrzynek, Huy T. Vo, R.W. Brodersen, Borivoje Nikolić and Chang Chen. Their work appears in journals such as IEEE Journal of Solid-State Circuits, Concurrent Engineering, Futures, IEEE Micro and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.