Brucek Khailany
- Hardware and Architecture top 0.1%
- Electrical and Electronic Engineering top 2%
- Computer Networks and Communications top 0.5%
- Computer Vision and Pattern Recognition top 0.5%
- Artificial Intelligence top 1%
- Co-authors
- William J. DallyRangharajan VenkatesanUjval J. KapasiJoel EmerStephen W. KecklerScott RixnerJohn D. OwensHaoxing Ren
- Topics
- Parallel Computing and Optimization Techniques (32 papers)VLSI and FPGA Design Techniques (19 papers)VLSI and Analog Circuit Testing (18 papers)
- Partner nations
- United StatesUnited KingdomChina
In The Last Decade
Brucek Khailany
77 papers receiving 4.4k citations
Hit Papers
Peers
Comparison fields: 5 of 96
- Hardware and Architecture 2.4k
- Electrical and Electronic Engineering 2.1k
- Computer Networks and Communications 1.6k
- Computer Vision and Pattern Recognition 1.3k
- Artificial Intelligence 922
Countries citing papers authored by Brucek Khailany
This map shows the geographic impact of Brucek Khailany's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Brucek Khailany with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Brucek Khailany more than expected).
Fields of papers citing papers by Brucek Khailany
This network shows the impact of papers produced by Brucek Khailany. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Brucek Khailany. The network helps show where Brucek Khailany may publish in the future.
Co-authorship network of co-authors of Brucek Khailany
This figure shows the co-authorship network connecting the top 25 collaborators of Brucek Khailany. A scholar is included among the top collaborators of Brucek Khailany based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Brucek Khailany. Brucek Khailany is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 0 | |
| 2 | 2 | |
| 3 | 0 | |
| 4 | 3 | |
| 5 | 1 | |
| 6 | 27 | |
| 7 | 4 | |
| 8 | 27 | |
| 9 | 30 | |
| 10 | 4 | |
| 11 | 39 | |
| 12 | 28 | |
| 13 | 6 | |
| 14 | Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk) | 3 |
| 15 | 66 | |
| 16 | 32 | |
| 17 | 5 | |
| 18 | 276 | |
| 19 | 141 | |
| 20 | 12 |
About Brucek Khailany
Brucek Khailany is a scholar working on Hardware and Architecture, Computer Networks and Communications and Computer Vision and Pattern Recognition, having authored 81 papers that have together received 4.6k indexed citations. Recurring topics across this work include Parallel Computing and Optimization Techniques (32 papers), VLSI and FPGA Design Techniques (19 papers) and VLSI and Analog Circuit Testing (18 papers). The work is most often cited by research in Hardware and Architecture (2.4k citations), Computational Mathematics (56 citations) and Computer Networks and Communications (1.6k citations). Brucek Khailany has collaborated with scholars based in United States, United Kingdom and China. Frequent co-authors include William J. Dally, Rangharajan Venkatesan, Ujval J. Kapasi, Joel Emer, Stephen W. Keckler, Scott Rixner, John D. Owens, Haoxing Ren, Angshuman Parashar and Anurag Mukkara. Their work appears in journals such as Communications of the ACM, IEEE Journal of Solid-State Circuits and Computer.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.