B. Gill

1.3k total citations
24 papers, 1.0k citations indexed

About

B. Gill is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Safety, Risk, Reliability and Quality. According to data from OpenAlex, B. Gill has authored 24 papers receiving a total of 1.0k indexed citations (citations by other indexed papers that have themselves been cited), including 24 papers in Electrical and Electronic Engineering, 11 papers in Hardware and Architecture and 3 papers in Safety, Risk, Reliability and Quality. Recurrent topics in B. Gill's work include Radiation Effects in Electronics (17 papers), Semiconductor materials and devices (13 papers) and VLSI and Analog Circuit Testing (11 papers). B. Gill is often cited by papers focused on Radiation Effects in Electronics (17 papers), Semiconductor materials and devices (13 papers) and VLSI and Analog Circuit Testing (11 papers). B. Gill collaborates with scholars based in United States, Canada and Israel. B. Gill's co-authors include N. Seifert, C. Papachristou, Francis Wolff, Subhasish Mitra, V. Ambrose, Shah M. Jahinuzzaman, R. Allmon, Ming Zhang, Kee Sup Kim and Quan Shi and has published in prestigious journals such as IEEE Transactions on Nuclear Science, Semiconductor Science and Technology and Design, Automation, and Test in Europe.

In The Last Decade

B. Gill

24 papers receiving 972 citations

Peers

Countries citing papers authored by B. Gill

Since Specialization

Citations

This map shows the geographic impact of B. Gill's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by B. Gill with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites B. Gill more than expected).

Fields of papers citing papers by B. Gill

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by B. Gill. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by B. Gill. The network helps show where B. Gill may publish in the future.

Co-authorship network of co-authors of B. Gill

This figure shows the co-authorship network connecting the top 25 collaborators of B. Gill. A scholar is included among the top collaborators of B. Gill based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with B. Gill. B. Gill is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Q&R On-Chip (QROC): A Unified, Oven-less and Scalable Circuit Reliability Platform 2022 ·Ketul B. Sutaria, Minki Cho, Anisur Rahman, (unknown), Rahul Sharma, (unknown), S. K. Gupta, (unknown), Ricardo Ascázubi, B. Gill	1
2	Soft Error Rate Improvements in 14-nm Technology Featuring Second-Generation 3D Tri-Gate Transistors 2015 ·IEEE Transactions on Nuclear Science ·N. Seifert, Shah M. Jahinuzzaman, Jyothi Velamala, Ricardo Ascázubi, (unknown), B. Gill, (unknown), J. Hicks	83
3	Correlating low energy neutron SER with broad beam neutron and 200 MeV proton SER for 22nm CMOS Tri-Gate devices 2013 ·Shah M. Jahinuzzaman, B. Gill, V. Ambrose, N. Seifert	9
4	Soft Error Susceptibilities of 22 nm Tri-Gate Devices 2012 ·IEEE Transactions on Nuclear Science ·N. Seifert, B. Gill, Shah M. Jahinuzzaman, (unknown), V. Ambrose, Quan Shi, R. Allmon, (unknown)	142
5	The Susceptibility of 45 and 32 nm Bulk CMOS Latches to Low-Energy Protons 2011 ·IEEE Transactions on Nuclear Science ·N. Seifert, B. Gill, Jonathan A. Pellish, Paul W. Marshall, Kenneth A. LaBel	28
6	On the radiation-induced soft error performance of hardened sequential elements in advanced bulk CMOS technologies 2010 ·N. Seifert, V. Ambrose, B. Gill, Qi Shi, R. Allmon, C. H. Recchia, S. Mukherjee, (unknown), (unknown), (unknown), A. Balasubramanian	98
7	Comparison of alpha-particle and neutron-induced combinational and sequential logic error rates at the 32nm technology node 2009 ·B. Gill, N. Seifert, (unknown)	85
8	Multi-cell upset probabilities of 45nm high-k + metal gate SRAM devices in terrestrial and space environments 2008 ·N. Seifert, B. Gill, (unknown), (unknown)	70
9	Interactive presentation: A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA 2007 ·Design, Automation, and Test in Europe ·B. Gill, C. Papachristou, Francis Wolff	5
10	A New Asymmetric SRAM Cell to Reduce Soft Errors and Leakage Power in FPGA 2007 ·B. Gill, C. Papachristou, Francis Wolff	21
11	On the Scalability of Redundancy based SER Mitigation Schemes 2007 ·N. Seifert, B. Gill, (unknown), (unknown), V. Ambrose	40
12	Design and Analysis Methodologies to Reduce Soft Errors in nanometer VLSI Circuits 2006 ·OhioLink ETD Center (Ohio Library and Information Network) ·B. Gill	2
13	Node sensitivity analysis for soft errors in CMOS logic 2006 ·B. Gill, C. Papachristou, Francis Wolff, N. Seifert	29
14	Soft Delay Error Analysis in Logic Circuits 2006 ·B. Gill, C. Papachristou, Francis Wolff	9
15	Combinational Logic Soft Error Correction 2006 ·Subhasish Mitra, Ming Zhang, (unknown), N. Seifert, B. Gill, Kee Sup Kim	127
16	Radiation-Induced Soft Error Rates of Advanced CMOS Bulk Devices 2006 ·N. Seifert, (unknown), (unknown), Balaji Narasimham, (unknown), (unknown), (unknown), Subhasish Mitra, B. Gill, J. Maiz	159
17	Soft delay error effects in CMOS combinational circuits 2004 ·B. Gill, C. Papachristou, Francis Wolff	20
18	The graded-gate FET: a MOS device structure for magnetic field sensing applications 1990 ·Semiconductor Science and Technology ·B. Gill, E.L. Heasell	1
19	A theory for the graded-gate FET 1988 ·Semiconductor Science and Technology ·B. Gill, E.L. Heasell	1
20	A Magnetic Field Sensor using a Graded Gate Potential 1987 ·European Solid-State Device Research Conference ·B. Gill, E.L. Heasell	1

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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