Balaji Narasimham

2.4k total citations
80 papers, 1.8k citations indexed

About

Balaji Narasimham is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Radiation. According to data from OpenAlex, Balaji Narasimham has authored 80 papers receiving a total of 1.8k indexed citations (citations by other indexed papers that have themselves been cited), including 80 papers in Electrical and Electronic Engineering, 43 papers in Hardware and Architecture and 3 papers in Radiation. Recurrent topics in Balaji Narasimham's work include Radiation Effects in Electronics (78 papers), Semiconductor materials and devices (46 papers) and VLSI and Analog Circuit Testing (42 papers). Balaji Narasimham is often cited by papers focused on Radiation Effects in Electronics (78 papers), Semiconductor materials and devices (46 papers) and VLSI and Analog Circuit Testing (42 papers). Balaji Narasimham collaborates with scholars based in United States, Israel and China. Balaji Narasimham's co-authors include B. L. Bhuva, L. W. Massengill, Ronald D. Schrimpf, Matthew J. Gadlage, Jonathan R. Ahlbin, Paul Eaton, Arthur F. Witulski, Robert A. Reed, William H. Robinson and Robert L. Shuler and has published in prestigious journals such as IEEE Electron Device Letters, Solid-State Electronics and IEEE Transactions on Nuclear Science.

In The Last Decade

Balaji Narasimham

78 papers receiving 1.7k citations

Peers

Balaji Narasimham
Matthew J. Gadlage United States
M.P. Baze United States
D.G. Mavis United States
T.L. Turflinger United States
M. Friendlich United States
Oluwole A. Amusan United States
B. Gill United States
M.-C. Calvet France
Y. Boulghassoul United States
K.A. LaBel United States
Matthew J. Gadlage United States
Balaji Narasimham
Citations per year, relative to Balaji Narasimham Balaji Narasimham (= 1×) peers Matthew J. Gadlage

Countries citing papers authored by Balaji Narasimham

Since Specialization
Citations

This map shows the geographic impact of Balaji Narasimham's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Balaji Narasimham with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Balaji Narasimham more than expected).

Fields of papers citing papers by Balaji Narasimham

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Balaji Narasimham. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Balaji Narasimham. The network helps show where Balaji Narasimham may publish in the future.

Co-authorship network of co-authors of Balaji Narasimham

This figure shows the co-authorship network connecting the top 25 collaborators of Balaji Narasimham. A scholar is included among the top collaborators of Balaji Narasimham based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Balaji Narasimham. Balaji Narasimham is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Narasimham, Balaji, et al.. (2024). Scaling Trends and Bias Dependence of SRAM SER from 16-nm to 3-nm FinFET. 10C.2–1.
2.
Narasimham, Balaji, et al.. (2023). Efficacy of Spatial and Temporal RHBD Techniques at Advanced Bulk FinFET Technology Nodes. IEEE Transactions on Nuclear Science. 70(8). 1814–1820. 3 indexed citations
3.
4.
Narasimham, Balaji, et al.. (2022). Single-Event Upset Cross-Section Trends for D-FFs at the 5- and 7-nm Bulk FinFET Technology Nodes. IEEE Transactions on Nuclear Science. 70(4). 381–386. 10 indexed citations
5.
Ball, Dennis R., Jingchen Cao, Shi-Jie Wen, et al.. (2021). Single-Event Upsets in a 7-nm Bulk FinFET Technology With Analysis of Threshold Voltage Dependence. IEEE Transactions on Nuclear Science. 68(5). 823–829. 14 indexed citations
6.
Narasimham, Balaji, et al.. (2021). Scaling Trends in the Soft Error Rate of SRAMs from Planar to 5-nm FinFET. 1–5. 27 indexed citations
7.
Mahatme, N. N., En Xia Zhang, Y. N. Liu, et al.. (2018). Analysis of Temporal Masking Effects on Master- and Slave-Type Flip-Flop SEUs and Related Applications. IEEE Transactions on Nuclear Science. 65(8). 1823–1829. 2 indexed citations
8.
Reed, Robert A., Brian D. Sierawski, L. W. Massengill, et al.. (2017). Predicting Muon-Induced SEU Rates for a 28-nm SRAM Using Protons and Heavy Ions to Calibrate the Sensitive Volume Model. IEEE Transactions on Nuclear Science. 65(2). 712–718. 18 indexed citations
9.
Mahatme, N. N., Liang Wang, En Xia Zhang, et al.. (2017). Impact of Temporal Masking of Flip-Flop Upsets on Soft Error Rates of Sequential Circuits. IEEE Transactions on Nuclear Science. 1–1. 12 indexed citations
10.
Narasimham, Balaji, Ennis T. Ogawa, Saket Gupta, et al.. (2017). Influence of polonium diffusion at elevated temperature on the alpha emission rate and memory SER performance. 3D–4.1.
11.
Mahatme, N. N., Liang Wang, En Xia Zhang, et al.. (2017). Effects of Temperature and Supply Voltage on SEU- and SET-Induced Errors in Bulk 40-nm Sequential Circuits. IEEE Transactions on Nuclear Science. 1–1. 11 indexed citations
12.
Narasimham, Balaji, et al.. (2012). A Hysteresis-Based D-Flip-Flop Design in 28 nm CMOS for Improved SER Hardness at Low Performance Overhead. IEEE Transactions on Nuclear Science. 59(6). 2847–2851. 13 indexed citations
13.
Bhuva, B. L., Balaji Narasimham, A. S. Oates, et al.. (2011). Soft error testing at advanced technology nodes. 5B.1.1–5B.1.4. 2 indexed citations
14.
Chatterjee, Indranil, et al.. (2011). Single-Event Charge Collection and Upset in 40-nm Dual- and Triple-Well Bulk CMOS SRAMs. IEEE Transactions on Nuclear Science. 58(6). 2761–2767. 34 indexed citations
15.
Jagannathan, S., Matthew J. Gadlage, B. L. Bhuva, et al.. (2010). Independent Measurement of SET Pulse Widths From N-Hits and P-Hits in 65-nm CMOS. IEEE Transactions on Nuclear Science. 49 indexed citations
16.
Gadlage, Matthew J., Ronald D. Schrimpf, Balaji Narasimham, et al.. (2008). Assessing Alpha Particle-Induced Single Event Transient Vulnerability in a 90-nm CMOS Technology. IEEE Electron Device Letters. 29(6). 638–640. 18 indexed citations
17.
Narasimham, Balaji, B. L. Bhuva, Ronald D. Schrimpf, et al.. (2008). Effects of Guard Bands and Well Contacts in Mitigating Long SETs in Advanced CMOS Processes. IEEE Transactions on Nuclear Science. 55(3). 1708–1713. 52 indexed citations
18.
Narasimham, Balaji & W.K. Luk. (2008). A multi-bit error detection scheme for DRAM using partial sums with parallel counters. 202–205. 7 indexed citations
19.
Narasimham, Balaji, B. L. Bhuva, Ronald D. Schrimpf, et al.. (2006). On-Chip Characterization of Single-Event Transient Pulsewidths. IEEE Transactions on Device and Materials Reliability. 6(4). 542–549. 125 indexed citations
20.
Shuler, Robert L., et al.. (2006). The Effectiveness of TAG or Guard-Gates in SET Suppression Using Delay and Dual-Rail Configurations at 0.35 $\mu$m. IEEE Transactions on Nuclear Science. 53(6). 3428–3431. 42 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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