Alexandre Valentian

1.2k total citations
59 papers, 708 citations indexed

About

Alexandre Valentian is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Alexandre Valentian has authored 59 papers receiving a total of 708 indexed citations (citations by other indexed papers that have themselves been cited), including 54 papers in Electrical and Electronic Engineering, 12 papers in Hardware and Architecture and 7 papers in Computer Networks and Communications. Recurrent topics in Alexandre Valentian's work include Low-power high-performance VLSI design (26 papers), Advancements in Semiconductor Devices and Circuit Design (22 papers) and Semiconductor materials and devices (18 papers). Alexandre Valentian is often cited by papers focused on Low-power high-performance VLSI design (26 papers), Advancements in Semiconductor Devices and Circuit Design (22 papers) and Semiconductor materials and devices (18 papers). Alexandre Valentian collaborates with scholars based in France, Belgium and Switzerland. Alexandre Valentian's co-authors include Édith Beigné, Yvain Thonnart, Lorena Anghel, Pascal Vivet, Olivier Bichler, Elisa Vianello, Olivier Thomas, C. Reita, Philippe Flatresse and G. Billiot and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Neural Networks and Learning Systems and Solid-State Electronics.

In The Last Decade

Alexandre Valentian

56 papers receiving 688 citations

Peers

Countries citing papers authored by Alexandre Valentian

Since Specialization

Citations

This map shows the geographic impact of Alexandre Valentian's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Alexandre Valentian with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Alexandre Valentian more than expected).

Fields of papers citing papers by Alexandre Valentian

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Alexandre Valentian. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Alexandre Valentian. The network helps show where Alexandre Valentian may publish in the future.

Co-authorship network of co-authors of Alexandre Valentian

This figure shows the co-authorship network connecting the top 25 collaborators of Alexandre Valentian. A scholar is included among the top collaborators of Alexandre Valentian based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Alexandre Valentian. Alexandre Valentian is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

#	Work	Indexed citations
1	Live Demonstration: A 772μJ/frame ImageNet Feature Extractor Accelerator on HD Images at 30FPS 2024 ·Ivan Miro-Panades, (unknown), (unknown), I. Kucher, (unknown), (unknown), (unknown), (unknown), Olivier Bichler, Alexandre Valentian	1
2	A 772μJ/frame ImageNet Feature Extractor Accelerator on HD Images at 30FPS 2024 ·Ivan Miro-Panades, (unknown), (unknown), I. Kucher, (unknown), (unknown), (unknown), (unknown), Olivier Bichler, Alexandre Valentian	0
3	Backpropagation-Based Learning Techniques for Deep Spiking Neural Networks: A Survey 2023 ·IEEE Transactions on Neural Networks and Learning Systems ·(unknown), (unknown), Alexandre Valentian, Lorena Anghel	44
4	SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration 2022 ·IEEE Journal of Solid-State Circuits ·Ivan Miro-Panades, (unknown), (unknown), (unknown), (unknown), (unknown), Baudouin Martineau, (unknown), (unknown), (unknown), Jean-Philippe Noël, Adam Makosiej, (unknown), (unknown), (unknown), (unknown), Yvain Thonnart, Alexandre Valentian, (unknown), Fabien Clermidy	15
5	A 50.5 ns Wake-Up-Latency 11.2 pJ/Inst Asynchronous Wake-Up Controller in FDSOI 28 nm 2019 ·Journal of Low Power Electronics and Applications ·(unknown), (unknown), (unknown), Ivan Miro-Panades, (unknown), Sébastien Thuries, Yvain Thonnart, Adam Makosiej, (unknown), (unknown), Alexandre Valentian, Pascal Vivet, Édith Beigné	3
6	From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose 2016 ·G. Cibrario, (unknown), J. Lacord, (unknown), O. Rozeau, (unknown), Olivier Billoint, Sébastien Thuries, Alexandre Valentian	1
7	UTBB FDSOI technology flexibility for ultra low power internet-of-things applications 2015 ·Édith Beigné, (unknown), Alexandre Valentian, Olivier Billoint, E. Amat, Dominique Morche	22
8	Design and Cryogenic Operation of a Hybrid Quantum-CMOS Circuit 2015 ·Physical Review Applied ·(unknown), S. J. Ray, X. Jehl, M. Sanquer, Alexandre Valentian, Sylvain Barraud	21
9	The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators 2014 ·(unknown), Alexandre Valentian, Pascal Vivet, Marc Duranton, Liqiang He, Olivier Temam	16
10	Experimental analysis of flip-flops minimum operating voltage in 28nm FDSOI and the impact of back bias and temperature 2014 ·Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) ·(unknown), (unknown), Alexandre Valentian, Jean-Didier Legat, David Bol	2
11	An efficient metric of setup time for pulsed flip-flops based on output transition time 2013 ·Digital Access to Libraries (Université catholique de Louvain (UCL), l'Université de Namur (UNamur) and the Université Saint-Louis (USL-B)) ·(unknown), Alexandre Valentian, (unknown), David Bol, Jean-Didier Legat	1
12	Designing digital circuits with nano-scale devices: Challenges and opportunities 2013 ·Solid-State Electronics ·(unknown), Ο. Thomas, Alexandre Valentian, Fabien Clermidy	10
13	Performance Limits of Nanoelectromechanical Switches (NEMS)-Based Adiabatic Logic Circuits 2013 ·Journal of Low Power Electronics and Applications ·Samer Houri, Christophe Poulain, Alexandre Valentian, Hervé Fanet	4
14	Fine grain multi-V<inf>T</inf> co-integration methodology in UTBB FD-SOI technology 2013 ·(unknown), Alexandre Valentian, Bastien Giraud, Yvain Thonnart, Jean-Philippe Noël, Philippe Flatresse, Édith Beigné	12
15	Integration and Frequency Dependent Parametric Modeling of Through Silicon via Involved in High Density 3D Chip Stacking 2010 ·ECS Transactions ·(unknown), C. Fuchs, (unknown), Patrick Leduc, (unknown), Aurélie Thuaire, (unknown), Alexandre Valentian, A. Farcy, (unknown), N. Sillon, P. Ancey, (unknown)	9
16	Power switch optimization and sizing in 65nm PD-SOI considering supply voltage noise 2010 ·(unknown), Alexandre Valentian, Philippe Flatresse, Marie‐Pierre Belleville	3
17	Gate bias circuit for an SCCMOS power switch achieving maximum leakage reduction 2007 ·Alexandre Valentian, Édith Beigné	6
18	A 130nm partially depleted SOI technology menu for-low-power applications 2005 ·(unknown), Philippe Flatresse, Alexandre Valentian, Ayed Ben Amara	2
19	Algorithm implementation for iris identification 2005 ·(unknown), Alexandre Valentian, Florence Rossant, (unknown), Ayed Ben Amara	7
20	On-chip signaling for ultra low-voltage 0.13 μm CMOS SOI technology 2004 ·Alexandre Valentian, Ayed Ben Amara	2

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact