Y. Itoh

521 total citations
31 papers, 341 citations indexed

About

Y. Itoh is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Hardware and Architecture. According to data from OpenAlex, Y. Itoh has authored 31 papers receiving a total of 341 indexed citations (citations by other indexed papers that have themselves been cited), including 28 papers in Electrical and Electronic Engineering, 17 papers in Computer Networks and Communications and 7 papers in Hardware and Architecture. Recurrent topics in Y. Itoh's work include Advanced Data Storage Technologies (17 papers), Semiconductor materials and devices (15 papers) and Low-power high-performance VLSI design (9 papers). Y. Itoh is often cited by papers focused on Advanced Data Storage Technologies (17 papers), Semiconductor materials and devices (15 papers) and Low-power high-performance VLSI design (9 papers). Y. Itoh collaborates with scholars based in Japan, South Korea and United States. Y. Itoh's co-authors include Yasunori Tanaka, F. Masuoka, Hiroaki Suzuki, Shinichi Takayama, R. Shirota, Tomoharu Tanaka, Koji Sakui, Yoichi Iwata, Y. Oowaki and F. Horiguchi and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Semiconductor Manufacturing.

In The Last Decade

Y. Itoh

30 papers receiving 317 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Y. Itoh Japan	11	299	109	76	47	45	31	341
K. Ohuchi Japan	13	389 1.3×	99 0.9×	68 0.9×	53 1.1×	39 0.9×	42	424
Kang-Deog Suh South Korea	10	247 0.8×	134 1.2×	39 0.5×	23 0.5×	35 0.8×	27	305
Jungdal Choi South Korea	10	252 0.8×	141 1.3×	34 0.4×	36 0.8×	30 0.7×	25	309
Carla Golla Italy	5	306 1.0×	151 1.4×	59 0.8×	36 0.8×	66 1.5×	7	398
Chih-Chang Hsieh Taiwan	11	276 0.9×	214 2.0×	84 1.1×	16 0.3×	54 1.2×	34	372
Akira Kotabe Japan	9	371 1.2×	104 1.0×	45 0.6×	13 0.3×	19 0.4×	20	406
Shih‐Hung Chen Belgium	13	461 1.5×	81 0.7×	58 0.8×	20 0.4×	28 0.6×	89	516
Masaru Kito Japan	5	367 1.2×	213 2.0×	46 0.6×	23 0.5×	49 1.1×	5	430
A. Fazio United States	8	271 0.9×	151 1.4×	42 0.6×	12 0.3×	30 0.7×	14	344
Hideaki Aochi Japan	9	456 1.5×	259 2.4×	52 0.7×	30 0.6×	58 1.3×	12	536

Countries citing papers authored by Y. Itoh

Since Specialization

Citations

This map shows the geographic impact of Y. Itoh's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Y. Itoh with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Y. Itoh more than expected).

Fields of papers citing papers by Y. Itoh

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Y. Itoh. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Y. Itoh. The network helps show where Y. Itoh may publish in the future.

Co-authorship network of co-authors of Y. Itoh

This figure shows the co-authorship network connecting the top 25 collaborators of Y. Itoh. A scholar is included among the top collaborators of Y. Itoh based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Y. Itoh. Y. Itoh is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Itoh, Y., et al.. (2005). 0.5V Asymmetric Three-Tr. Cell (ATC) DRAM Using 90nm Generic CMOS Logic Process. 366–369. 10 indexed citations

Okada, Hideaki, et al.. (2002). Development of a low voltage source driver for large TFT-LCD system for computer applications. 111–114. 2 indexed citations

Hazama, H., et al.. (2002). A quick address detection of an anomalous memory cell for flash EEPROM. 195–199.

Hazama, H., Koji Sakui, Keisuke Masuda, et al.. (2002). A new technique for measuring threshold voltage distribution in flash EEPROM devices. 283–287. 13 indexed citations

Shirota, R., Ryo Nakayama, R. Kirisawa, et al.. (2002). A 2.3 mu m/sup 2/ memory cell structure for 16 Mb NAND EEPROMs. 103–106. 2 indexed citations

Takashima, D., et al.. (2001). A 76mm 2 8Mb Chain Ferroelectric Memory.. 44. 40–41. 3 indexed citations

Takashima, D., Yoshinori Takeuchi, Y. Itoh, et al.. (2001). A 76-mm/sup 2/ 8-Mb chain ferroelectric memory. IEEE Journal of Solid-State Circuits. 36(11). 1713–1720. 25 indexed citations

Tanaka, S., et al.. (2000). FRAM cell design with high immunity to fatigue and imprint for 0.5 μm 3 V 1T1C 1 Mbit FRAM. IEEE Transactions on Electron Devices. 47(4). 781–788. 3 indexed citations

Kim, Jin‐Ki, Koji Sakui, Sungsoo Lee, et al.. (1996). A 120mm^2 64Mb NAND Flash Memory Achieving 180ns/byte Effective Program Speed. 96(226). 79–84. 9 indexed citations

10.

Hazama, H., et al.. (1996). A Novel Threshold Voltage Distribution Measuring Technique for Flash EEPROM Devices. IEICE Transactions on Electronics. 145–151. 3 indexed citations

11.

Iwata, Yoichi, K. Imamiya, Hiroshi Nakamura, et al.. (1995). A 35 ns cycle time 3.3 V only 32 Mb NAND flash EEPROM. IEEE Journal of Solid-State Circuits. 30(11). 1157–1164. 10 indexed citations

12.

Tanaka, Tomoharu, Yoichi Iwata, Yasunori Tanaka, et al.. (1991). A 4 Mb NAND EEPROM with tight programmed V/sub t/ distribution. IEEE Journal of Solid-State Circuits. 26(4). 492–496. 16 indexed citations

13.

Tanaka, Tomoharu, Yohei Iwata, Yasunori Tanaka, et al.. (1990). A 4-Mbit NAND-EEPROM with tight programmed V _t distribution. 105–106. 8 indexed citations

14.

Iwata, Yoichi, Tomoharu Tanaka, Y. Itoh, et al.. (1990). A high-density NAND EEPROM with block-page programming for microcomputer applications. IEEE Journal of Solid-State Circuits. 25(2). 417–424. 10 indexed citations

15.

Numata, Kenji, Y. Oowaki, Y. Itoh, et al.. (1989). New nibbled-page architecture for high-density DRAMs. IEEE Journal of Solid-State Circuits. 24(4). 900–904. 5 indexed citations

16.

Watanabe, Shinji, Y. Oowaki, Y. Itoh, et al.. (1989). An experimental 16-Mbit CMOS DRAM chip with a 100-MHz serial read/write mode. IEEE Journal of Solid-State Circuits. 24(3). 763–770. 10 indexed citations

17.

Iwata, Yoichi, et al.. (1989). A high density NAND EEPROM with block-page programming for microcomputer applications. 10.1/1–10.1/4. 3 indexed citations

18.

Itoh, Y., Ryo Nakayama, Satoshi Inoue, et al.. (1988). New NAND cell for ultra high density 5v-only EEPROMs.. Symposium on VLSI Technology. 33–34. 7 indexed citations

19.

Itoh, Y., et al.. (1987). Noise-generation analysis and noise-suppression design techniques in megabit DRAMs. IEEE Journal of Solid-State Circuits. 22(4). 619–622. 9 indexed citations

20.

Horiguchi, F., et al.. (1985). A 1Mb DRAM with a folded capacitor cell structure. 4. 244–245. 7 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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