K. Ohuchi

802 total citations
42 papers, 424 citations indexed

About

K. Ohuchi is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Biomedical Engineering. According to data from OpenAlex, K. Ohuchi has authored 42 papers receiving a total of 424 indexed citations (citations by other indexed papers that have themselves been cited), including 42 papers in Electrical and Electronic Engineering, 6 papers in Computer Networks and Communications and 5 papers in Biomedical Engineering. Recurrent topics in K. Ohuchi's work include Semiconductor materials and devices (35 papers), Advancements in Semiconductor Devices and Circuit Design (28 papers) and Low-power high-performance VLSI design (18 papers). K. Ohuchi is often cited by papers focused on Semiconductor materials and devices (35 papers), Advancements in Semiconductor Devices and Circuit Design (28 papers) and Low-power high-performance VLSI design (18 papers). K. Ohuchi collaborates with scholars based in Japan, United States and Netherlands. K. Ohuchi's co-authors include F. Masuoka, Y. Oowaki, D. Takashima, Soichi Watanabe, Tomoharu Tanaka, Hiroki Nakano, R. Shirota, Koji Sakui, Hiroyuki Hara and K. Tsuchida and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and Japanese Journal of Applied Physics.

In The Last Decade

K. Ohuchi

36 papers receiving 398 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
K. Ohuchi Japan 13 389 99 68 53 39 42 424
Y. Itoh Japan 11 299 0.8× 109 1.1× 76 1.1× 47 0.9× 45 1.2× 31 341
C. Svensson Sweden 7 362 0.9× 122 1.2× 202 3.0× 51 1.0× 19 0.5× 14 418
Jungdal Choi South Korea 10 252 0.6× 141 1.4× 34 0.5× 36 0.7× 30 0.8× 25 309
H.T. Mouftah Canada 13 351 0.9× 195 2.0× 46 0.7× 74 1.4× 60 1.5× 58 453
T. Gabara United States 10 304 0.8× 68 0.7× 50 0.7× 105 2.0× 12 0.3× 39 323
Kang-Deog Suh South Korea 10 247 0.6× 134 1.4× 39 0.6× 23 0.4× 35 0.9× 27 305
C.H. Kim United States 13 732 1.9× 48 0.5× 189 2.8× 80 1.5× 11 0.3× 16 755
P.E. Gronowski United States 9 407 1.0× 145 1.5× 272 4.0× 45 0.8× 26 0.7× 14 503
K. Otsuga Japan 7 313 0.8× 77 0.8× 23 0.3× 61 1.2× 14 0.4× 13 338
Masood Qazi United States 12 482 1.2× 34 0.3× 196 2.9× 38 0.7× 15 0.4× 17 518

Countries citing papers authored by K. Ohuchi

Since Specialization
Citations

This map shows the geographic impact of K. Ohuchi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Ohuchi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Ohuchi more than expected).

Fields of papers citing papers by K. Ohuchi

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by K. Ohuchi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Ohuchi. The network helps show where K. Ohuchi may publish in the future.

Co-authorship network of co-authors of K. Ohuchi

This figure shows the co-authorship network connecting the top 25 collaborators of K. Ohuchi. A scholar is included among the top collaborators of K. Ohuchi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with K. Ohuchi. K. Ohuchi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Kurusu, Tsutomu, Masaki Kondo, K. Nishitani, et al.. (2020). 8-1 A TCAD Study on Mechanism and Countermeasure for Program Characteristics Degradation of 3D Semicircular Charge Trap Flash Memory. 161–164. 3 indexed citations
2.
Fujiwara, M., T. Morooka, K. Ohuchi, et al.. (2006). Impact of BOX Scaling on 30 nm Gate Length FD SOI MOSFETs. 180–182. 21 indexed citations
3.
Tanzawa, Tôru, Yasunori Tanaka, Tomoharu Tanaka, et al.. (2005). A Quick Boosting Charge Pump Circuit for High Density and Low Voltage Flash Memories. 65–66. 4 indexed citations
5.
Inaba, S., K. Miyano, A. Hokazono, et al.. (2004). SODEL FET: Novel Channel and Source/Drain Profile Engineering Schemes by Selective Si Epitaxial Growth Technology. IEEE Transactions on Electron Devices. 51(9). 1401–1408. 3 indexed citations
6.
Inaba, Teruhiko, D. Takashima, Y. Oowaki, et al.. (2002). A 250 mV bit-line swing scheme for a 1 V 4 Gb DRAM. 29. 99–100.
7.
Ohta, Masaya, et al.. (2002). A 0.5 V power-supply scheme for low power LSIs using multi-Vt SOI CMOS technology. 219–220. 13 indexed citations
8.
Takashima, D., et al.. (2002). A novel power-off mode for a battery-backup DRAM. 29. 109–110. 1 indexed citations
9.
Oowaki, Y., Mototaka Kamoshida, Akira Ohta, et al.. (2002). A 0.5 V 200 MHz 1-stage 32 b ALU using a body bias controlled SOI pass-gate logic. 286–287,. 11 indexed citations
10.
Oowaki, Y., et al.. (2002). 0.5 V SOI CMOS pass-gate logic. 25. 88–89,. 9 indexed citations
11.
Takashima, D., et al.. (2002). Noise suppression scheme for giga-scale DRAM with hundreds of I/Os. 196–197. 2 indexed citations
12.
Takashima, D., Soichi Watanabe, Hiroki Nakano, et al.. (1994). Standby/active mode logic for sub-1-V operating ULSI memory. IEEE Journal of Solid-State Circuits. 29(4). 441–447. 21 indexed citations
13.
Tsuchida, K., Yoshihiro Watanabe, D. Takashima, et al.. (1991). A 33-ns 64-Mb DRAM. IEEE Journal of Solid-State Circuits. 26(11). 1498–1505. 15 indexed citations
14.
Iwata, Yoichi, Tomoharu Tanaka, Y. Itoh, et al.. (1990). A high-density NAND EEPROM with block-page programming for microcomputer applications. IEEE Journal of Solid-State Circuits. 25(2). 417–424. 10 indexed citations
15.
Tsuchida, K., Y. Oowaki, M. Ohta, et al.. (1990). The stabilized reference-line (SRL) technique for scaled DRAMs. IEEE Journal of Solid-State Circuits. 25(1). 24–29. 6 indexed citations
16.
Numata, Kenji, Y. Oowaki, Y. Itoh, et al.. (1989). New nibbled-page architecture for high-density DRAMs. IEEE Journal of Solid-State Circuits. 24(4). 900–904. 5 indexed citations
17.
Sakui, Koji, et al.. (1989). A new static memory cell based on the reverse base current effect of bipolar transistors. IEEE Transactions on Electron Devices. 36(6). 1215–1217. 20 indexed citations
18.
Watanabe, Shinji, Y. Oowaki, Y. Itoh, et al.. (1989). An experimental 16-Mbit CMOS DRAM chip with a 100-MHz serial read/write mode. IEEE Journal of Solid-State Circuits. 24(3). 763–770. 10 indexed citations
19.
Oowaki, Y., Kenji Numata, Kenji Tsuchiya, et al.. (1987). A sub-10-ns 16×16 multiplier using 0.6-μm CMOS technology. IEEE Journal of Solid-State Circuits. 22(5). 762–767. 16 indexed citations
20.
Furuyama, T., K. Ohuchi, & S. Kohyama. (1979). An electrical mechanism for holding time degradation in dynamic MOS RAM's. IEEE Transactions on Electron Devices. 26(11). 1684–1690. 10 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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