K. Kanda

489 total citations
19 papers, 126 citations indexed

About

K. Kanda is a scholar working on Computer Networks and Communications, Electrical and Electronic Engineering and Computational Theory and Mathematics. According to data from OpenAlex, K. Kanda has authored 19 papers receiving a total of 126 indexed citations (citations by other indexed papers that have themselves been cited), including 18 papers in Computer Networks and Communications, 15 papers in Electrical and Electronic Engineering and 5 papers in Computational Theory and Mathematics. Recurrent topics in K. Kanda's work include Advanced Data Storage Technologies (18 papers), Semiconductor materials and devices (12 papers) and Semiconductor Lasers and Optical Devices (5 papers). K. Kanda is often cited by papers focused on Advanced Data Storage Technologies (18 papers), Semiconductor materials and devices (12 papers) and Semiconductor Lasers and Optical Devices (5 papers). K. Kanda collaborates with scholars based in Japan and South Korea. K. Kanda's co-authors include Koji Sakui, Hiroshi Nakamura, Koji Hosono, Ken Takeuchi, Y. Itoh, Tamio Ikehashi, H. Hazama, K. Imamiya, J. Miyamoto and R. Shirota and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Semiconductor Manufacturing and IEICE Transactions on Electronics.

In The Last Decade

K. Kanda

17 papers receiving 121 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
K. Kanda Japan 7 95 72 22 22 7 19 126
Dae-Seok Byeon South Korea 9 166 1.7× 74 1.0× 30 1.4× 22 1.0× 10 1.4× 19 201
Jaihyuk Song South Korea 8 111 1.2× 59 0.8× 15 0.7× 10 0.5× 12 1.7× 20 135
Kye-Hyun Kyung South Korea 6 94 1.0× 72 1.0× 50 2.3× 12 0.5× 7 1.0× 12 132
Hoosung Cho South Korea 6 147 1.5× 74 1.0× 23 1.0× 8 0.4× 16 2.3× 8 172
Youcef Bouchebaba Canada 6 224 2.4× 103 1.4× 57 2.6× 12 0.5× 5 0.7× 22 276
Sung-Min Joe South Korea 9 236 2.5× 160 2.2× 23 1.0× 20 0.9× 23 3.3× 27 272
Jin-Man Han South Korea 6 28 0.3× 46 0.6× 11 0.5× 14 0.6× 5 0.7× 8 65
Giovanni M. Paolucci Italy 14 351 3.7× 197 2.7× 24 1.1× 17 0.8× 13 1.9× 26 367
D. Park South Korea 11 257 2.7× 66 0.9× 11 0.5× 11 0.5× 21 3.0× 20 278
Ki‐Whan Song South Korea 8 225 2.4× 67 0.9× 29 1.3× 10 0.5× 18 2.6× 27 266

Countries citing papers authored by K. Kanda

Since Specialization
Citations

This map shows the geographic impact of K. Kanda's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Kanda with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Kanda more than expected).

Fields of papers citing papers by K. Kanda

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by K. Kanda. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Kanda. The network helps show where K. Kanda may publish in the future.

Co-authorship network of co-authors of K. Kanda

This figure shows the co-authorship network connecting the top 25 collaborators of K. Kanda. A scholar is included among the top collaborators of K. Kanda based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with K. Kanda. K. Kanda is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

19 of 19 papers shown
1.
Shibata, Noboru, et al.. (2012). A 19nm 112.8mm2 64Gb Multi-level(2bit/cell) Flash Memory with 400Mb/s/pin 1.8V Toggle Mode Interface. IEICE Technical Report; IEICE Tech. Rep.. 112(15). 1–5. 7 indexed citations
2.
Takashima, D., et al.. (2011). An embedded DRAM technology for high-performance NAND flash memories. 504–505. 1 indexed citations
3.
Takashima, D., et al.. (2011). An Embedded DRAM Technology for High-Performance NAND Flash Memories. IEEE Journal of Solid-State Circuits. 47(2). 536–546. 5 indexed citations
4.
NAKAMURA, Dai, et al.. (2008). A 120mm2 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology. IEICE Technical Report; IEICE Tech. Rep.. 108(6). 25–30. 26 indexed citations
5.
Kanda, K.. (2008). A 120mm2 16Gb 4 Multi Level NAND Flash Memory with 43nm CMOS Technology. Medical Entomology and Zoology. 430–431. 1 indexed citations
6.
Nakamura, Hiroshi, K. Imamiya, Tamio Ikehashi, et al.. (2005). A 125mm/sup 2/ 1Gb NAND flash memory with 10MB/s program throughput. 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315). 2. 82–411. 2 indexed citations
7.
Nakamura, Hiroki, K. Imamiya, Tamio Ikehashi, et al.. (2003). A 125 mm/sup 2/ 1Gb NAND flash memory with 10 MB/s program throughput. 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315). 1. 106–450. 2 indexed citations
8.
Takeuchi, Ken, S. Satoh, K. Imamiya, et al.. (2003). A source-line programming scheme for low voltage operation NAND flash memories. 37–38. 2 indexed citations
9.
Imamiya, K., Hiroshi Nakamura, Ken Takeuchi, et al.. (2003). A 130 mm/sup 2/ 256 Mb NAND flash with shallow trench isolation technology. 112–113.
10.
Imamiya, K., Hiroshi Nakamura, Tamio Ikehashi, et al.. (2002). A 125-mm/sup 2/ 1-Gb NAND flash memory with 10-MByte/s program speed. IEEE Journal of Solid-State Circuits. 37(11). 1493–1501. 15 indexed citations
12.
Hazama, H., Koji Sakui, Keisuke Masuda, et al.. (2002). A new technique for measuring threshold voltage distribution in flash EEPROM devices. 283–287. 13 indexed citations
13.
Kim, Jin‐Ki, Koji Sakui, Sungsoo Lee, et al.. (2002). A 120 mm/sup 2/ 64 Mb NAND flash memory achieving 180 ns/byte effective program speed. 168–169. 3 indexed citations
14.
Sakui, Koji, K. Kanda, Hiroshi Nakamura, K. Imamiya, & J. Miyamoto. (2002). A sophisticated bit-by-bit verifying scheme for NAND EEPROMs. 236–237. 1 indexed citations
15.
Imamiya, K., Hiroshi Nakamura, Ken Takeuchi, et al.. (1999). A 130-mm/sup 2/, 256-Mbit NAND flash with shallow trench isolation technology. IEEE Journal of Solid-State Circuits. 34(11). 1536–1543. 18 indexed citations
16.
Hazama, H., et al.. (1997). Quick address detection of anomalous memory cells in a flash memory test structure. IEEE Transactions on Semiconductor Manufacturing. 10(2). 196–200. 1 indexed citations
17.
Kim, Jin‐Ki, Koji Sakui, Y. Itoh, et al.. (1997). A 120-mm/sup 2/ 64-Mb NAND flash memory achieving 180 ns/Byte effective program speed. IEEE Journal of Solid-State Circuits. 32(5). 670–680. 17 indexed citations
18.
Kim, Jin‐Ki, Koji Sakui, Sungsoo Lee, et al.. (1996). A 120mm^2 64Mb NAND Flash Memory Achieving 180ns/byte Effective Program Speed. 96(226). 79–84. 9 indexed citations
19.
Hazama, H., et al.. (1996). A Novel Threshold Voltage Distribution Measuring Technique for Flash EEPROM Devices. IEICE Transactions on Electronics. 145–151. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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