Countries citing papers authored by Shih‐Hung Chen
Since
Specialization
Citations
This map shows the geographic impact of Shih‐Hung Chen's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Shih‐Hung Chen with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Shih‐Hung Chen more than expected).
This network shows the impact of papers produced by Shih‐Hung Chen. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Shih‐Hung Chen. The network helps show where Shih‐Hung Chen may publish in the future.
Co-authorship network of co-authors of Shih‐Hung Chen
This figure shows the co-authorship network connecting the top 25 collaborators of Shih‐Hung Chen.
A scholar is included among the top collaborators of Shih‐Hung Chen based on the total number of
citations received by their joint publications. Widths of edges
represent the number of papers authors have co-authored together.
Node borders
signify the number of papers an author published with Shih‐Hung Chen. Shih‐Hung Chen is excluded from
the visualization to improve readability, since they are connected to all nodes in the network.
Lin, Shih‐Hsiang, Marko Simicic, Shih‐Hung Chen, et al.. (2023). ESD mitigation for 3D IC hybrid bonding. VUBIR (Vrije Universiteit Brussel). 1–9.1 indexed citations
Nagata, Makoto, Satoshi Takaya, Hiroaki Ikeda, et al.. (2014). CDM protection of a 3D TSV memory IC with a 100 GB/s wide I/O data bus. Electrical Overstress/Electrostatic Discharge Symposium. 1–7.3 indexed citations
11.
Scholz, Mirko, Shih‐Hung Chen, Geert Hellings, & Dimitri Linten. (2013). Impact of the on-chip and off-chip ESD protection network on transient-induced latch-up in CMOS IC. Electrical Overstress/Electrostatic Discharge Symposium. 1–7.5 indexed citations
12.
Linten, Dimitri, Geert Hellings, Shih‐Hung Chen, et al.. (2013). ESD performance of high mobility SiGe quantum well bulk finFET diodes and PMOS devices. Electrical Overstress/Electrostatic Discharge Symposium. 1–8.4 indexed citations
13.
Chen, Shih‐Hung, Geert Hellings, S. Thijs, et al.. (2013). Exploring ESD challenges in sub-20-nm bulk FinFET CMOS technology nodes. Electrical Overstress/Electrostatic Discharge Symposium. 1–8.8 indexed citations
14.
Chen, Shih‐Hung, S. Thijs, Dimitri Linten, et al.. (2012). ESD protection devices placed inside keep-out zone (KOZ) of through Silicon Via (TSV) in 3D stacked integrated circuits. Electrical Overstress/Electrostatic Discharge Symposium. 1–8.12 indexed citations
15.
Hellings, Geert, Dimitri Linten, S. Thijs, et al.. (2012). ESD characterization of high mobility SiGe Quantum Well and Ge devices for future CMOS scaling. Electrical Overstress/Electrostatic Discharge Symposium. 1–6.5 indexed citations
16.
Thijs, S., Alessio Griffoni, Dimitri Linten, et al.. (2011). On gated diodes for ESD protection in bulk FinFET CMOS technology. Electrical Overstress/Electrostatic Discharge Symposium. 1–8.15 indexed citations
17.
Scholz, Mirko, S. Thijs, Alessio Griffoni, et al.. (2011). System-level ESD protection of high-voltage tolerant IC pins-A case study. VUBIR (Vrije Universiteit Brussel). 35–38.1 indexed citations
18.
Chen, Shih‐Hung, et al.. (2009). An automated IC chip marking inspection system for surface mounted devices on taping machines. Journal of Scientific & Industrial Research. 68(5). 361–366.9 indexed citations
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive
bibliographic database. While OpenAlex provides broad and valuable coverage of the global
research landscape, it—like all bibliographic datasets—has inherent limitations. These include
incomplete records, variations in author disambiguation, differences in journal indexing, and
delays in data updates. As a result, some metrics and network relationships displayed in
Rankless may not fully capture the entirety of a scholar's output or impact.