Ujjwal Guin

2.8k total citations · 1 hit paper
67 papers, 1.8k citations indexed

About

Ujjwal Guin is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Artificial Intelligence. According to data from OpenAlex, Ujjwal Guin has authored 67 papers receiving a total of 1.8k indexed citations (citations by other indexed papers that have themselves been cited), including 54 papers in Hardware and Architecture, 45 papers in Electrical and Electronic Engineering and 14 papers in Artificial Intelligence. Recurrent topics in Ujjwal Guin's work include Physical Unclonable Functions (PUFs) and Hardware Security (49 papers), Integrated Circuits and Semiconductor Failure Analysis (34 papers) and Advanced Memory and Neural Computing (12 papers). Ujjwal Guin is often cited by papers focused on Physical Unclonable Functions (PUFs) and Hardware Security (49 papers), Integrated Circuits and Semiconductor Failure Analysis (34 papers) and Advanced Memory and Neural Computing (12 papers). Ujjwal Guin collaborates with scholars based in United States, United Kingdom and China. Ujjwal Guin's co-authors include Mohammad Tehranipoor, Daniel DiMase, Domenic Forte, Mark Tehranipoor, John M. Carulli, Yiorgos Makris, Ke Huang, Ziqi Zhou, Adit D. Singh and Anthony Skjellum and has published in prestigious journals such as Proceedings of the IEEE, IEEE Access and IEEE Transactions on Electron Devices.

In The Last Decade

Ujjwal Guin

62 papers receiving 1.7k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain

2014 353 citations Ujjwal Guin, Daniel DiMase et al. profile →

Peers

Countries citing papers authored by Ujjwal Guin

Since Specialization

Citations

This map shows the geographic impact of Ujjwal Guin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ujjwal Guin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ujjwal Guin more than expected).

Fields of papers citing papers by Ujjwal Guin

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ujjwal Guin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ujjwal Guin. The network helps show where Ujjwal Guin may publish in the future.

Co-authorship network of co-authors of Ujjwal Guin

This figure shows the co-authorship network connecting the top 25 collaborators of Ujjwal Guin. A scholar is included among the top collaborators of Ujjwal Guin based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ujjwal Guin. Ujjwal Guin is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Ionizing Radiation-Induced Data Imprinting Effects in SRAM Arrays 2025 ·IEEE Transactions on Nuclear Science ·(unknown), (unknown), Aleksandar Milenković, Ujjwal Guin, Biswajit Ray	0
2	Reward-Based Blockchain Infrastructure for 3D Ic Supply Chain Provenance 2025 ·(unknown), (unknown), Bhaskar Krishnamachari, Vivek Menon, Ujjwal Guin	0
3	Optimizing Supply Chain Management using Permissioned Blockchains 2024 ·(unknown), Ujjwal Guin	0
4	A Novel Self-referencing Approach Using Memory Power-up States for Detecting COTS SRAMs 2024 ·(unknown), (unknown), Ujjwal Guin	0
5	Exploring Security Solutions and Vulnerabilities for Embedded Non-Volatile Memories 2024 ·(unknown), Jeremy Muldavin, Ujjwal Guin	0
6	Complexity Analysis of the SAT Attack on Logic Locking 2023 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·(unknown), Ujjwal Guin	10
7	CamSkyGate 2022 ·Proceedings of the 59th ACM/IEEE Design Automation Conference ·Yuqiao Zhang, (unknown), Peng Li, Ujjwal Guin	1
8	AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking 2022 ·Journal of Electronic Testing ·(unknown), Ayush Jain, Mir Tanjidur Rahman, Navid Asadizanjani, Jiafeng Xie, Ujjwal Guin	3
9	Beware of Discarding Used SRAMs: Information is Stored Permanently 2022 ·(unknown), (unknown), Ujjwal Guin	2
10	Test and Yield Loss Reduction of AI and Deep Learning Accelerators 2021 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·(unknown), Ujjwal Guin	24
11	A novel topology-guided attack and its countermeasure towards secure logic locking 2020 ·Journal of Cryptographic Engineering ·Yuqiao Zhang, Ayush Jain, (unknown), Ziqi Zhou, Ujjwal Guin	2
12	Low-Cost and Secure Firmware Obfuscation Method for Protecting Electronic Systems From Cloning 2019 ·IEEE Internet of Things Journal ·Benjamin Cyr, (unknown), Ujjwal Guin	14
13	Standards for Hardware Security 2019 ·GetMobile Mobile Computing and Communications ·Ujjwal Guin, Navid Asadizanjani, Mark Tehranipoor	7
14	Two-Pattern ∆IDDQ Test for Recycled IC Detection 2019 ·(unknown), Ujjwal Guin, Adit D. Singh, Vishwani D. Agrawal	5
15	Special Session: Delay Fault Testing - Present and Future 2019 ·(unknown), (unknown), Ujjwal Guin, Vishwani D. Agrawal	8
16	A Blockchain-Based Framework for Supply Chain Provenance 2019 ·IEEE Access ·(unknown), Julie Dixon, Ujjwal Guin, Daniel DiMase	97
17	A Secure Low-Cost Edge Device Authentication Scheme for the Internet of Things 2018 ·Ujjwal Guin, Adit D. Singh, Mahabubul Alam, (unknown), Anthony Skjellum	30
18	Robust Design-for-Security Architecture for Enabling Trust in IC Manufacturing and Test 2018 ·IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Ujjwal Guin, Ziqi Zhou, Adit D. Singh	60
19	Counterfeit Integrated Circuits 2015 ·Mark Tehranipoor, Ujjwal Guin, Domenic Forte	85
20	Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead 2014 ·Journal of Electronic Testing ·Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor	159

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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