Siddharth Garg

7.3k total citations · 4 hit papers
148 papers, 2.9k citations indexed

About

Siddharth Garg is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Artificial Intelligence. According to data from OpenAlex, Siddharth Garg has authored 148 papers receiving a total of 2.9k indexed citations (citations by other indexed papers that have themselves been cited), including 90 papers in Electrical and Electronic Engineering, 82 papers in Hardware and Architecture and 44 papers in Artificial Intelligence. Recurrent topics in Siddharth Garg's work include Low-power high-performance VLSI design (34 papers), Physical Unclonable Functions (PUFs) and Hardware Security (33 papers) and Parallel Computing and Optimization Techniques (30 papers). Siddharth Garg is often cited by papers focused on Low-power high-performance VLSI design (34 papers), Physical Unclonable Functions (PUFs) and Hardware Security (33 papers) and Parallel Computing and Optimization Techniques (30 papers). Siddharth Garg collaborates with scholars based in United States, Canada and India. Siddharth Garg's co-authors include Diana Marculescu, Brendan Dolan-Gavitt, Kang Liu, Tianyu Gu, Ramesh Karri, Mahesh Tripunitara, Muhammad Shafique, Jeff Zhang, Jörg Henkel and Zahra Ghodsi and has published in prestigious journals such as IEEE Access, IEEE Journal on Selected Areas in Communications and IEEE Transactions on Smart Grid.

In The Last Decade

Siddharth Garg

139 papers receiving 2.9k citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

BadNets: Evaluating Backdooring Attacks on Deep Neural Networks

2019 606 citations Tianyu Gu, Kang Liu et al. IEEE Access profile →
Chip-Chat: Challenges and Opportunities in Conversational Hardware Design

2023 111 citations Siddharth Garg, Ramesh Karri et al. profile →
VeriGen: A Large Language Model for Verilog Code Generation

2024 79 citations Shailja Thakur, Baleegh Ahmad et al. ACM Transactions on Design Automation of Electronic Systems profile →
Benchmarking Large Language Models for Automated Verilog RTL Code Generation

2023 75 citations Shailja Thakur, Baleegh Ahmad et al. profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Siddharth Garg United States	27	1.5k	1.4k	1.1k	667	306	148	2.9k
Jean‐Pierre Seifert Germany	29	986 0.7×	1.2k 0.8×	1.4k 1.3×	607 0.9×	668 2.2×	127	2.6k
Patrick Schaumont United States	28	1.5k 1.0×	2.4k 1.7×	1.6k 1.4×	558 0.8×	703 2.3×	223	3.8k
Joseph Zambreno United States	20	793 0.5×	947 0.7×	584 0.5×	681 1.0×	323 1.1×	120	1.9k
Mark Tehranipoor United States	33	2.5k 1.6×	2.9k 2.1×	998 0.9×	289 0.4×	635 2.1×	223	4.0k
Weng‐Fai Wong Singapore	29	984 0.6×	1.3k 0.9×	476 0.4×	1.3k 1.9×	210 0.7×	182	2.8k
Akash Kumar Germany	32	2.2k 1.4×	2.3k 1.6×	432 0.4×	1.7k 2.5×	126 0.4×	333	4.1k
Milos Prvulović United States	32	1.0k 0.7×	1.9k 1.3×	1.5k 1.4×	1.4k 2.0×	703 2.3×	118	3.0k
Michael S. Hsiao United States	25	2.2k 1.4×	2.5k 1.7×	506 0.5×	364 0.5×	341 1.1×	229	3.2k
Alex Yakovlev United Kingdom	27	2.5k 1.7×	2.2k 1.6×	501 0.5×	1.2k 1.8×	70 0.2×	498	4.3k
Alice C. Parker United States	30	2.0k 1.3×	3.1k 2.2×	359 0.3×	1.2k 1.8×	122 0.4×	167	4.2k

Countries citing papers authored by Siddharth Garg

Since Specialization

Citations

This map shows the geographic impact of Siddharth Garg's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Siddharth Garg with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Siddharth Garg more than expected).

Fields of papers citing papers by Siddharth Garg

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Siddharth Garg. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Siddharth Garg. The network helps show where Siddharth Garg may publish in the future.

Co-authorship network of co-authors of Siddharth Garg

This figure shows the co-authorship network connecting the top 25 collaborators of Siddharth Garg. A scholar is included among the top collaborators of Siddharth Garg based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Siddharth Garg. Siddharth Garg is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

Venkatesan, Sivarama, et al.. (2025). Learned Precoding-Oriented CSI Feedback in Multi-Cell Multi-User MIMO Systems. IEEE Transactions on Wireless Communications. 25. 2359–2372.

Krishnamurthy, P., et al.. (2025). Detecting All-to-One Backdoor Attacks in Black-Box DNNs via Differential Robustness to Noise. IEEE Access. 13. 36099–36111.

Thakur, Shailja, Baleegh Ahmad, Hammond Pearce, et al.. (2024). VeriGen: A Large Language Model for Verilog Code Generation. ACM Transactions on Design Automation of Electronic Systems. 29(3). 1–31. 79 indexed citations breakdown →

Garg, Siddharth, et al.. (2024). Evaluating LLMs for Hardware Design and Test. 1–6. 5 indexed citations

Krishnamurthy, P., et al.. (2023). Privacy-Preserving Collaborative Learning Through Feature Extraction. IEEE Transactions on Dependable and Secure Computing. 21(1). 486–498. 4 indexed citations

Krishnamurthy, P., et al.. (2023). Differential Analysis of Triggers and Benign Features for Black-Box DNN Backdoor Detection. IEEE Transactions on Information Forensics and Security. 18. 4668–4680. 6 indexed citations

Krishnamurthy, P., et al.. (2022). A Feature-Based On-Line Detector to Remove Adversarial-Backdoors by Iterative Demarcation. IEEE Access. 10. 5545–5558. 9 indexed citations

Krishnamurthy, P., et al.. (2021). Overriding Autonomous Driving Systems Using Adaptive Adversarial Billboards. IEEE Transactions on Intelligent Transportation Systems. 23(8). 11386–11396. 11 indexed citations

Ghodsi, Zahra, et al.. (2020). CryptoNAS: Private inference on a ReLU budget. Neural Information Processing Systems. 33. 16961–16971. 4 indexed citations

10.

Pilato, Christian, Francesco Regazzoni, Ramesh Karri, & Siddharth Garg. (2018). TAO: Techniques for Algorithm-Level Obfuscation during High-Level Synthesis. 1–6. 13 indexed citations

11.

Liu, Kang, et al.. (2018). Lack of robustness of Lidar-based deep learning systems to small adversarial perturbations. International Symposium on Robotics. 359–365. 6 indexed citations

12.

Ghodsi, Zahra, Siddharth Garg, & Ramesh Karri. (2017). Optimal checkpointing for secure intermittently-powered IoT devices. arXiv (Cornell University). 376–383. 9 indexed citations

13.

Ghodsi, Zahra, Tianyu Gu, & Siddharth Garg. (2017). SafetyNets: verifiable execution of deep neural networks on an untrusted cloud. Neural Information Processing Systems. 30. 4675–4684. 13 indexed citations

14.

Shafique, Muhammad, Dennis R. E. Gnad, Siddharth Garg, & Jörg Henkel. (2015). Variability-aware dark silicon management in on-chip many-core systems. Design, Automation, and Test in Europe. 387–392. 41 indexed citations

15.

Garg, Siddharth, et al.. (2013). Securing computer hardware using 3D integrated circuit (IC) technology and split manufacturing for obfuscation. USENIX Security Symposium. 495–510. 116 indexed citations

16.

Garg, Siddharth, et al.. (2013). Low cost permanent fault detection using ultra-reduced instruction set co-processors. Design, Automation, and Test in Europe. 933–938. 6 indexed citations

17.

Juan, Da-Cheng, et al.. (2013). Learning the optimal operating point for many-core systems with extended range voltage/frequency scaling. 8. 33 indexed citations

18.

Garg, Siddharth & Diana Marculescu. (2013). Addressing Process Variations at the Microarchitecture and System Level. 6(3). 217–291. 1 indexed citations

19.

Garg, Siddharth & Diana Marculescu. (2009). System-level process variability analysis and mitigation for 3D MPSoCs. Design, Automation, and Test in Europe. 604–609. 3 indexed citations

20.

Garg, Siddharth & Diana Marculescu. (2007). Interactive presentation: System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs. Design, Automation, and Test in Europe. 403–408. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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