S. Minehane

514 citations

18 papers · 390 indexed · h-index 9

Impact in

Hardware and Architecture top 5%
- VLSI and Analog Circuit Testing
Electrical and Electronic Engineering top 10%
- Advancements in Semiconductor Devices and Circuit Design
- Semiconductor materials and devices
- Integrated Circuits and Semiconductor Failure Analysis
- Low-power high-performance VLSI design
- VLSI and FPGA Design Techniques
- Ferroelectric and Negative Capacitance Devices

Papers in

Hardware and Architecture 5
- VLSI and Analog Circuit Testing 5
Statistics, Probability and Uncertainty 3
- Probabilistic and Robust Engineering Design 3

Co-authors: Sharad Saxena J.A. Babcock P.A. Clifton M. Ershov Andrei Shibkov Anirvan M. Sengupta Jianjun Cheng Christopher P. Hess
Journals: Microelectronics Reliability (4 papers)Microelectronic Engineering (1 paper)IEEE Transactions on Electron Devices (1 paper)Applied Physics Letters (1 paper)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)
Partner nations: Ireland United States France

In The Last Decade

S. Minehane

18 papers receiving 365 citations

Peers

Countries citing papers authored by S. Minehane

Since Specialization

Citations

This map shows the geographic impact of S. Minehane's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Minehane with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Minehane more than expected).

Fields of papers citing papers by S. Minehane

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Minehane. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Minehane. The network helps show where S. Minehane may publish in the future.

Co-authors

The 25 scholars most cited alongside S. Minehane, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with S. Minehane Line = papers co-authored together S. Minehane links everyone, so they are left out of the graph.

All Works

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18 of 18 papers shown

#	Work
1	An efficient control variates method for yield estimation of analog circuits based on a local model Tursellino Tiziana, HUMI SHIBAKAWA, Jens Tingleff, S. Minehane, CEM Centro De Estudos Da Metrópole, Laurent Latorre, Pascal Nouet	2012	3
2	Variation in Transistor Performance and Leakage in Nanometer-Scale Technologies IEEE Transactions on Electron Devices ·Sharad Saxena, Christopher P. Hess, Anastasios Kotronis, Berenice Carmen Augusta Young Rabines, Ailsa M. Azizah, Ignacio Pelayo-Tejo, ByungIn Choi, S. Minehane, Amanda Ribeiro Gonçalves, M. Quarantelli	2008	77
3	Application-specific worst case corners using response surfaces and statistical models IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Anirvan M. Sengupta, Sharad Saxena, Lauren Haire, J.E. Baños, S. Minehane, Jianjun Cheng	2005	66
4	Application specific worst case corners using response surfaces and statistical models Anirvan M. Sengupta, Sharad Saxena, Lauren Haire, J.E. Baños, S. Minehane, Jianjun Cheng	2004	6
5	Test structures and analysis techniques for estimation of the impact of layout on MOSFET performance and variability Sharad Saxena, S. Minehane, Jianjun Cheng, Anirvan M. Sengupta, Christopher P. Hess, M. Quarantelli, J.E. Baños, CEM Centro De Estudos Da Metrópole	2004	9
6	Degradation dynamics, recovery, and characterization of negative bias temperature instability Microelectronics Reliability ·M. Ershov, Sharad Saxena, S. Minehane, P.A. Clifton, CEM Centro De Estudos Da Metrópole, Suzanne Goldacker, Roger Wrenn, Spencer Graves, S. Winters	2004	15
7	Transient effects and characterization methodology of negative bias temperature instability in pMOS transistors M. Ershov, Suzanne Goldacker, Sharad Saxena, Andrei Shibkov, S. Minehane, J.A. Babcock, S. Winters, Roger Wrenn, Takashi Yamashita, P.A. Clifton, CEM Centro De Estudos Da Metrópole	2003	23
8	Characterization and modeling of MOSFET mismatch of a deep submicron technology M. Quarantelli, Sharad Saxena, Zahra Rahmanitabar, J.A. Babcock, Christopher P. Hess, S. Minehane, S. Winters, Jianjun Chen, Roger Wrenn, Carlo Guardiani	2003	24
9	Dynamic recovery of negative bias temperature instability in p-type metal–oxide–semiconductor field-effect transistors Applied Physics Letters ·M. Ershov, Sharad Saxena, Roger Wrenn, S. Winters, S. Minehane, J.A. Babcock, Suzanne Goldacker, P.A. Clifton, CEM Centro De Estudos Da Metrópole, Andrei Shibkov	2003	135
10	Direct BSIM3v3 parameter extraction for hot-carrier reliability simulation of N-channel LDD MOSFETs S. Minehane, Susan D. Healy, P. O'Sullivan, K.G. McCarthy, A. Mathewson, Barry S. Mason	2002	1
11	Evolution of BSIM3v3 parameters during hot-carrier stress S. Minehane, P. O'Sullivan, A. Mathewson, Barry S. Mason	2002	5
12	The application of a direct parameter extraction strategy to hot-carrier reliability simulation of n-channel LDD MOSFETs S. Minehane, Miguel Moreno Gallego, P. O'Sullivan, A. Mathewson, Barry S. Mason	2002	2
13	Design for reliability Microelectronics Reliability ·S. Minehane, Russell Duane, P. O'Sullivan, K.G. McCarthy, A. Mathewson	2000	8
14	Statistical Hot-Carrier Reliability Simulation using a Novel SPICE Parameter Evolution Model S. Minehane, K.G. McCarthy, P. O'Sullivan, A. Mathewson	2000	1
15	Novel Parameter Extraction Techniques for Low-Voltage, Low-Power Technologies European Solid-State Device Research Conference ·S. Minehane, K.G. McCarthy, P. O'Sullivan, A. Mathewson	1999	3
16	Modelling and simulation of reliability for design Microelectronic Engineering ·A. Mathewson, P. O'Sullivan, A. Concannon, Sean Foley, S. Minehane, Russell Duane, Z S Steffek	1999	9
17	Experiences on reliability simulation in the framework of the PROPHECY project Microelectronics Reliability ·Horst Rempp, Mark John Hayter, A. Scorzoni, Третьякова Мария Александровна, A. Sousa e Silva, S. Minehane	1999	1
18	Direct parameter extraction for hot-carrier reliability simulation Microelectronics Reliability ·S. Minehane, Susan D. Healy, P. O'Sullivan, K.G. McCarthy, A. Mathewson, Barry S. Mason	1997	2

About S. Minehane

S. Minehane is a scholar working on Hardware and Architecture, Statistics, Probability and Uncertainty, Electrical and Electronic Engineering, Management Science and Operations Research and Surfaces, Coatings and Films, having authored 18 papers that have together received 390 indexed citations. Recurring topics across this work include Semiconductor materials and devices (10 papers), Advancements in Semiconductor Devices and Circuit Design (9 papers), Integrated Circuits and Semiconductor Failure Analysis (6 papers), VLSI and Analog Circuit Testing (5 papers), Silicon Carbide Semiconductor Technologies (5 papers), Probabilistic and Robust Engineering Design (3 papers), Copper Interconnects and Reliability (2 papers) and VLSI and FPGA Design Techniques (2 papers). The work is most often cited by research in Hardware and Architecture (82 citations), Electrical and Electronic Engineering (370 citations), Statistics, Probability and Uncertainty (13 citations), Computational Theory and Mathematics (25 citations) and Management Science and Operations Research (14 citations). S. Minehane has collaborated with scholars based in Ireland, United States and France. Frequent co-authors include Sharad Saxena, J.A. Babcock, P.A. Clifton, M. Ershov, Andrei Shibkov, Anirvan M. Sengupta, Jianjun Cheng, Christopher P. Hess, M. Quarantelli and A. Mathewson. Their work appears in journals such as Microelectronics Reliability, Microelectronic Engineering, IEEE Transactions on Electron Devices, Applied Physics Letters and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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