Matthew M. Ziegler

1.6k citations

40 papers · 772 indexed · h-index 14

Hardware and Architecture top 5%
- Parallel Computing and Optimization Techniques 8
- Embedded Systems Design Techniques 7
- VLSI and Analog Circuit Testing 4
Electrical and Electronic Engineering top 5%
- Low-power high-performance VLSI design 17
- Advancements in Semiconductor Devices and Circuit Design 14
- Semiconductor materials and devices 13
- VLSI and FPGA Design Techniques 12
Computational Theory and Mathematics top 5%
Biomedical Engineering
- Nanowire Synthesis and Applications 6
Cellular and Molecular Neuroscience

Co-authors: Mircea R. Stan Paul D. Franzon Seth Copen Goldstein John Lach Luca P. Carloni Stephen Kosonocky Rajiv Joshi Steven P. Kowalczyk
Cited by: Hardware and Architecture Electrical and Electronic Engineering Computational Theory and Mathematics
Journals: Proceedings of the IEEE (1 paper)Annals of the New York Academy of Sciences (1 paper)IEEE Journal of Solid-State Circuits (2 papers)
Partner nations: United States Germany India

In The Last Decade

Matthew M. Ziegler

40 papers receiving 724 citations

Peers

Countries citing papers authored by Matthew M. Ziegler

Since Specialization

Citations

This map shows the geographic impact of Matthew M. Ziegler's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Matthew M. Ziegler with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Matthew M. Ziegler more than expected).

Fields of papers citing papers by Matthew M. Ziegler

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Matthew M. Ziegler. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Matthew M. Ziegler. The network helps show where Matthew M. Ziegler may publish in the future.

Co-authorship network

The 25 scholars most cited alongside Matthew M. Ziegler, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Matthew M. Ziegler Line = papers co-authored together Matthew M. Ziegler links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	5th IBM IEEE CAS/EDS AI Compute Symposium (AICS’22) [Education] IEEE Circuits and Systems Magazine ·Rajiv Joshi,Kaoutar El Maghraoui,Arvind Kumar,Matthew M. Ziegler	2023	1
2	Design Flow Parameter Optimization with Multi-Phase Positive Nondeterministic Tuning Matthew M. Ziegler,Lakshmi Reddy,R. Franch	2022	2
3	A Learning-Based Recommender System for Autotuning Design Flows of Industrial High-Performance Processors Jihye Kwon,Matthew M. Ziegler,Luca P. Carloni	2019	16
4	Cascaded and resonant SRAM supply boosting for ultra-low voltage cognitive IoT applications Rajiv Joshi,Matthew M. Ziegler,Karthik Swaminathan,Nandhini Chandramoorthy	2018	1
5	Programmable supply boosting techniques for near threshold and wide operating voltage SRAM Rajiv Joshi,Matthew M. Ziegler	2017	6
6	Early Scenario Pruning for Efficient Design Space Exploration in Physical Synthesis Mohd Anwar,Sourav Saha,Matthew M. Ziegler,Lakshmi Reddy	2016	2
7	A Synthesis-Parameter Tuning System for Autonomous Design-Space Exploration Matthew M. Ziegler,Hung‐Yi Liu,George Gristede,Bruce Owens,Ricardo Nigaglioni,Luca P. Carloni	2016	18
8	POWER8 design methodology innovations for improving productivity and reducing power Matthew M. Ziegler,Ruchir Puri,Bob Philhower,R. Franch,W.K. Luk,J. Leenstra,Peter Verwegen,Niels Fricke,George Gristede,Eric Fluhr,Victor Zyuban	2014	8
9	LatchPlanner: latch placement algorithm for datapath-oriented high-performance VLSI designs International Conference on Computer Aided Design ·Minsik Cho,Hua Xiang,Haoxing Ren,Matthew M. Ziegler,Ruchir Puri	2013	6
10	Power reduction by aggressive synthesis design space exploration Matthew M. Ziegler,George Gristede,Victor Zyuban	2013	4
11	Power reduction by aggressive synthesis design space exploration Matthew M. Ziegler,George Gristede,Victor Zyuban	2013	3
12	LatchPlanner: Latch placement algorithm for datapath-oriented high-performance VLSI designs Minsik Cho,Hua Xiang,Haoxing Ren,Matthew M. Ziegler,Ruchir Puri	2013	3
13	The opportunity cost of low power design Matthew M. Ziegler,Victor Zyuban,George Gristede,Milena Vratonjić,Joshua Friedrich	2009	4
14	A Sub-600-mV, Fluctuation Tolerant 65-nm CMOS SRAM Array With Dynamic Cell Biasing IEEE Journal of Solid-State Circuits ·A.J. Bhavnagarwala,Stephen Kosonocky,C. Radens,Y.H. Chan,Kevin Stawiasz,Uma Srinivasan,Steven P. Kowalczyk,Matthew M. Ziegler	2008	72
15	Large-signal two-terminal device model for nanoelectronic circuit analysis IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·Garrett S. Rose,Matthew M. Ziegler,Mircea R. Stan	2004	13
16	A universal device model for nanoelectronic circuit simulation Matthew M. Ziegler,Garrett S. Rose,Mircea R. Stan	2003	14
17	Scalability Simulations for Nanomemory Systems Integrated on the Molecular Scale Annals of the New York Academy of Sciences ·Matthew M. Ziegler,Carl A. Picconatto,James C. Ellenbogen,André DeHon,Deli Wang,Zhaohui Zhong,Charles M. Lieber	2003	22
18	The CMOS/nano interface from a circuits perspective Matthew M. Ziegler,Mircea R. Stan	2003	13
19	Design and analysis of crossbar circuits for molecular nanoelectronics Matthew M. Ziegler,Mircea R. Stan	2003	79
20	A Case for CMOS/nano co-design Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design ·Matthew M. Ziegler,Mircea R. Stan	2002	22

About Matthew M. Ziegler

Matthew M. Ziegler is a scholar working on Hardware and Architecture, Computational Mathematics and Electrical and Electronic Engineering, having authored 40 papers that have together received 772 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (17 papers), Advancements in Semiconductor Devices and Circuit Design (14 papers), Semiconductor materials and devices (13 papers), VLSI and FPGA Design Techniques (12 papers), Parallel Computing and Optimization Techniques (8 papers), Embedded Systems Design Techniques (7 papers), Nanowire Synthesis and Applications (6 papers) and VLSI and Analog Circuit Testing (4 papers). The work is most often cited by research in Hardware and Architecture (138 citations), Electrical and Electronic Engineering (703 citations) and Computational Theory and Mathematics (100 citations). Matthew M. Ziegler has collaborated with scholars based in United States, Germany and India. Frequent co-authors include Mircea R. Stan, Paul D. Franzon, Seth Copen Goldstein, John Lach, Luca P. Carloni, Stephen Kosonocky, Rajiv Joshi, Steven P. Kowalczyk, Uma Srinivasan and A.J. Bhavnagarwala. Their work appears in journals such as Proceedings of the IEEE, Annals of the New York Academy of Sciences and IEEE Journal of Solid-State Circuits.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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