H. Feldis

609 total citations
16 papers, 129 citations indexed

About

H. Feldis is a scholar working on Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials and Biomedical Engineering. According to data from OpenAlex, H. Feldis has authored 16 papers receiving a total of 129 indexed citations (citations by other indexed papers that have themselves been cited), including 16 papers in Electrical and Electronic Engineering, 11 papers in Electronic, Optical and Magnetic Materials and 4 papers in Biomedical Engineering. Recurrent topics in H. Feldis's work include Copper Interconnects and Reliability (11 papers), Semiconductor materials and devices (10 papers) and 3D IC and TSV technologies (6 papers). H. Feldis is often cited by papers focused on Copper Interconnects and Reliability (11 papers), Semiconductor materials and devices (10 papers) and 3D IC and TSV technologies (6 papers). H. Feldis collaborates with scholars based in France, Japan and Belgium. H. Feldis's co-authors include M. Fayolle, M. Assous, J. Torrès, G. Passemard, O. Louveau, Paul‐Henri Haumesser, V. Jousseaume, Lucile Broussous, Christophe Licitra and Fabrice Jourdan and has published in prestigious journals such as Journal of The Electrochemical Society, Journal of Vacuum Science & Technology A Vacuum Surfaces and Films and Microelectronic Engineering.

In The Last Decade

H. Feldis

15 papers receiving 125 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
H. Feldis France	6	117	72	37	23	22	16	129
P. Brun France	5	67 0.6×	36 0.5×	11 0.3×	19 0.8×	17 0.8×	9	77
C. Pelto United States	6	110 0.9×	36 0.5×	20 0.5×	7 0.3×	9 0.4×	10	125
C. Richard France	7	137 1.2×	31 0.4×	22 0.6×	23 1.0×	13 0.6×	18	150
M. Hussein United States	3	57 0.5×	41 0.6×	17 0.5×	15 0.7×	13 0.6×	6	70
M. Shinosky United States	13	307 2.6×	208 2.9×	19 0.5×	16 0.7×	15 0.7×	22	319
C. Arvet France	10	223 1.9×	24 0.3×	16 0.4×	44 1.9×	61 2.8×	28	230
T. Lacrevaz France	7	145 1.2×	37 0.5×	5 0.1×	36 1.6×	33 1.5×	37	172
L. Pinzelli France	5	102 0.9×	26 0.4×	7 0.2×	39 1.7×	17 0.8×	12	109
Tomasz Brożek United States	9	273 2.3×	26 0.4×	20 0.5×	48 2.1×	11 0.5×	76	292
Andreas Martin Germany	12	501 4.3×	54 0.8×	21 0.6×	35 1.5×	10 0.5×	72	519

Countries citing papers authored by H. Feldis

Since Specialization

Citations

This map shows the geographic impact of H. Feldis's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by H. Feldis with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites H. Feldis more than expected).

Fields of papers citing papers by H. Feldis

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by H. Feldis. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by H. Feldis. The network helps show where H. Feldis may publish in the future.

Co-authorship network of co-authors of H. Feldis

This figure shows the co-authorship network connecting the top 25 collaborators of H. Feldis. A scholar is included among the top collaborators of H. Feldis based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with H. Feldis. H. Feldis is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

16 of 16 papers shown

Sunohara, Masahiro, Kenichi Mori, Kei Murayama, et al.. (2013). Electrical and morphological characterization for high integrated silicon interposer and technology transfer from 200 mm to 300mm wafer. 334–341.

Charbonnier, Jean, M. Assous, Masahiro Sunohara, et al.. (2012). High density 3D silicon interposer technology development and electrical characterization for high end applications. 1–7. 11 indexed citations

Sunohara, Masahiro, Jean Charbonnier, M. Assous, et al.. (2012). Full Integration and Electrical Characterization of 3D Silicon Interposer Demonstrator Incorporating High Density TSVs and Interconnects. IMAPSource Proceedings. 2012(1). 984–990. 5 indexed citations

Assous, M., Patrick Leduc, Aurélie Thuaire, et al.. (2010). A successful implementation of dual damascene architecture to copper TSV for 3D high density applications. 1–4. 3 indexed citations

Feldis, H., et al.. (2009). A new method for hermeticity measurements using porous ultra low k dielectrics for sub-ppm moisture detection. TRANSDUCERS 2009 - 2009 International Solid-State Sensors, Actuators and Microsystems Conference. 5. 168–171. 4 indexed citations

Fontaine, Hervé, et al.. (2009). Impact of the Volatile Acid Contaminants on Copper Interconnects Electrical Performances. ECS Transactions. 25(5). 79–86. 4 indexed citations

Possémé, N., T. Chevolleau, David Tormey, et al.. (2008). Efficiency of reducing and oxidizing ash plasmas in preventing metallic barrier diffusion into porous SiOCH. Microelectronic Engineering. 85(8). 1842–1849. 16 indexed citations

Jousseaume, V., M. Fayolle, C. Guedj, et al.. (2005). Pore Sealing of a Porous Dielectric by Using a Thin PECVD a-SiC:H Conformal Liner. Journal of The Electrochemical Society. 152(10). F156–F156. 17 indexed citations

Assous, M., Julia Simon, Lucile Broussous, et al.. (2004). Porous dielectric dual damascene patterning issues for 65 nm node: can architecture bring a solution?. 97–99. 4 indexed citations

10.

Mourier, Thierry, V. Jousseaume, Florence Fusalba, et al.. (2004). Porous low k pore sealing process study for 65 nm and below technologies. 245–247. 5 indexed citations

11.

Fayolle, M., V. Jousseaume, M. Assous, et al.. (2004). Cu/ULK integration using a post integration porogen removal approach. 208–210. 4 indexed citations

12.

Fayolle, M., J. Torrès, G. Passemard, et al.. (2003). Integration of Cu/SiOC in dual damascene interconnect for 0.1 μm technology using a new SiC material as dielectric barrier. 39–41. 4 indexed citations

13.

Farcy, A., J. Torrès, V. Arnal, et al.. (2003). A new damascene architecture for high-performance metal–insulator–metal capacitors integration. Microelectronic Engineering. 70(2-4). 368–372. 15 indexed citations

14.

Morand, Y., M. Fayolle, M. Assous, et al.. (2002). Copper-SiOC-AirGap integration in a double level metal interconnect. 276–277. 2 indexed citations

15.

Fayolle, M., J. Torrès, G. Passemard, et al.. (2002). Integration of Cu/SiOC in Cu dual damascene interconnect for 0.1-μm technology. Microelectronic Engineering. 64(1-4). 35–42. 23 indexed citations

16.

Feldis, H., et al.. (1998). Dielectric etching for 0.18 μm technologies. Journal of Vacuum Science & Technology A Vacuum Surfaces and Films. 16(3). 1604–1608. 12 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact