Gianluca Boselli

723 total citations
61 papers, 550 citations indexed

About

Gianluca Boselli is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Infectious Diseases. According to data from OpenAlex, Gianluca Boselli has authored 61 papers receiving a total of 550 indexed citations (citations by other indexed papers that have themselves been cited), including 61 papers in Electrical and Electronic Engineering, 4 papers in Hardware and Architecture and 0 papers in Infectious Diseases. Recurrent topics in Gianluca Boselli's work include Electrostatic Discharge in Electronics (55 papers), Integrated Circuits and Semiconductor Failure Analysis (41 papers) and Semiconductor materials and devices (32 papers). Gianluca Boselli is often cited by papers focused on Electrostatic Discharge in Electronics (55 papers), Integrated Circuits and Semiconductor Failure Analysis (41 papers) and Semiconductor materials and devices (32 papers). Gianluca Boselli collaborates with scholars based in United States, India and Netherlands. Gianluca Boselli's co-authors include Jeremy C. Smith, Akram Salman, C. Duvvury, Charvaka Duvvury, V. Reddy, Vesselin Vassilev, Mayank Shrivastava, J. Antonio Travieso-Rodríguez, Vijay Reddy and F.G. Kuper and has published in prestigious journals such as IEEE Transactions on Electron Devices, IEEE Transactions on Nuclear Science and Microelectronics Reliability.

In The Last Decade

Gianluca Boselli

59 papers receiving 517 citations

Peers

Gianluca Boselli

EEE

AMPO

A. Juge France

C. Dachs Belgium

Alessio Griffoni Belgium

N. Fel France

M. Rafik France

W.W. Abadeer United States

Kai Esmark Germany

A. Bajolet France

Amit Jha United States

María Toledano Luque Belgium

A. Juge France

Gianluca Boselli

458 ×0.8

EEE

22 ×0.6

27 ×1.4

AMPO

13 ×1.1

35 ×3.9

Citations per year, relative to Gianluca Boselli Gianluca Boselli (= 1×) peers A. Juge

Countries citing papers authored by Gianluca Boselli

Since Specialization

Citations

This map shows the geographic impact of Gianluca Boselli's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Gianluca Boselli with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Gianluca Boselli more than expected).

Fields of papers citing papers by Gianluca Boselli

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Gianluca Boselli. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Gianluca Boselli. The network helps show where Gianluca Boselli may publish in the future.

Co-authorship network of co-authors of Gianluca Boselli

This figure shows the co-authorship network connecting the top 25 collaborators of Gianluca Boselli. A scholar is included among the top collaborators of Gianluca Boselli based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Gianluca Boselli. Gianluca Boselli is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Gnani, Elena, et al.. (2025). Optimization of the drain-side configuration in ESD-protection SCR-LDMOS for high holding-voltage applications. Microelectronics Reliability. 168. 115664–115664. 1 indexed citations

Radhakrishna, Ujwal, Chang Niu, Gianluca Boselli, et al.. (2025). Analytical Modeling of Short-Channel Effects in BEOL-Compatible Thin-Film Transistors. IEEE Transactions on Electron Devices. 72(5). 2381–2389. 2 indexed citations

Reggiani, Susanna, et al.. (2023). TCAD study of the Holding-Voltage Modulation in Irradiated SCR-LDMOS for HV ESD Protection. Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna). 34. 1–6. 1 indexed citations

Boselli, Gianluca, et al.. (2023). Impact of Thin-oxide Gate on the On-Resistance of HV-PNP Under ESD Stress. 1–5. 1 indexed citations

Boselli, Gianluca, et al.. (2022). HV-LDMOS Device Engineering Insights for Moving Current Filament to Enhance ESD Robustness. IEEE Transactions on Electron Devices. 69(3). 1242–1250. 2 indexed citations

Sankaralingam, Rajkumar, et al.. (2022). Unique Rise Time Sensitivity Leading to Air Discharge System-Level ESD Failures in Bidirectional High Voltage SCRs. IEEE Transactions on Electron Devices. 69(5). 2552–2559. 1 indexed citations

Sankaralingam, Rajkumar, et al.. (2021). System-Level IEC ESD Failures in High-Voltage DeNMOS-SCR: Physical Insights and Design Guidelines. IEEE Transactions on Electron Devices. 68(9). 4242–4250. 11 indexed citations

Salman, Akram, et al.. (2015). Improved inductive-system-level IEC ESD performance for automotive applications using mutual ballasted ESD protection technique. Microelectronics Reliability. 57. 47–52. 3 indexed citations

Boselli, Gianluca, et al.. (2013). Predictive modeling of peak discharge current during charged device model test of microelectronic components. Electrical Overstress/Electrostatic Discharge Symposium. 1–8. 6 indexed citations

10.

Boselli, Gianluca & J.S. Brodsky. (2013). The very unusual case of the IEC-robust IC with low HBM performance. Electrical Overstress/Electrostatic Discharge Symposium. 1–7. 3 indexed citations

11.

Salman, Akram, et al.. (2013). Mutual ballasting: A novel technique for improved inductive system level IEC ESD stress performance for automotive applications. Electrical Overstress/Electrostatic Discharge Symposium. 9 indexed citations

12.

Salman, Akram, et al.. (2012). A flexible simulation model for system level ESD stresses with application to ESD design and troubleshooting. Electrical Overstress/Electrostatic Discharge Symposium. 1–6. 11 indexed citations

13.

Salman, Akram, et al.. (2011). Novel techniques to modulate the holding voltage in high voltage ESD protections. Electrical Overstress/Electrostatic Discharge Symposium. 1–7. 5 indexed citations

14.

Boselli, Gianluca, et al.. (2011). The Relevance Of Long-Duration TLP Stress On System Level ESD Design. Electrical Overstress/Electrostatic Discharge Symposium. 13(1). 993–1000. 10 indexed citations

15.

Boselli, Gianluca, et al.. (2010). An automated ESD verification tool for analog design. Electrical Overstress/Electrostatic Discharge Symposium. 1–8. 7 indexed citations

16.

Salman, Akram, et al.. (2010). Solutions to mitigate parasitic NPN bipolar action in high voltage analog technologies. Electrical Overstress/Electrostatic Discharge Symposium. 1–8. 4 indexed citations

17.

Boselli, Gianluca, et al.. (2005). Analysis of ESD protection components in 65nm CMOS technology: Scaling perspective and impact on ESD design window. Electrical Overstress/Electrostatic Discharge Symposium. 1–10. 33 indexed citations

18.

Smith, Jeremy C. & Gianluca Boselli. (2004). A MOSFET power supply clamp with feedback enhanced triggering for ESD protection in advanced CMOS technologies. Microelectronics Reliability. 45(2). 201–210. 41 indexed citations

19.

Boselli, Gianluca, Charvaka Duvvury, & Vijay Reddy. (2002). Efficient pnp characteristics of pMOS transistors in sub-0.13µm ESD protection circuits. Electrical Overstress/Electrostatic Discharge Symposium. 260–269. 15 indexed citations

20.

Boselli, Gianluca, et al.. (2001). Modeling substrate diodes under ultra high ESD injection conditions. Electrical Overstress/Electrostatic Discharge Symposium. 70–80. 6 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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