Chris Chu

5.0k total citations
139 papers, 3.8k citations indexed

About

Chris Chu is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Chris Chu has authored 139 papers receiving a total of 3.8k indexed citations (citations by other indexed papers that have themselves been cited), including 129 papers in Electrical and Electronic Engineering, 95 papers in Hardware and Architecture and 22 papers in Computer Networks and Communications. Recurrent topics in Chris Chu's work include VLSI and FPGA Design Techniques (114 papers), VLSI and Analog Circuit Testing (78 papers) and Low-power high-performance VLSI design (59 papers). Chris Chu is often cited by papers focused on VLSI and FPGA Design Techniques (114 papers), VLSI and Analog Circuit Testing (78 papers) and Low-power high-performance VLSI design (59 papers). Chris Chu collaborates with scholars based in United States, Taiwan and Hong Kong. Chris Chu's co-authors include Martin D. F. Wong, Min Pan, Yiu-Chung Wong, Yue Xu, V. Natarajan, Yanheng Zhang, Chung-Ping Chen, Nirmal K. Viswanathan, Evangeline F. Y. Young and Wai-Kei Mak and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Annals of Operations Research and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Chris Chu

137 papers receiving 3.7k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Chris Chu United States 36 3.6k 2.4k 821 140 134 139 3.8k
Malgorzata Marek-Sadowska United States 35 4.2k 1.2× 3.0k 1.3× 658 0.8× 132 0.9× 499 3.7× 289 4.7k
Carl Sechen United States 26 2.0k 0.6× 1.4k 0.6× 380 0.5× 128 0.9× 285 2.1× 134 2.3k
Xianlong Hong China 23 2.1k 0.6× 1.0k 0.4× 480 0.6× 93 0.7× 99 0.7× 250 2.2k
J. Cong United States 26 2.5k 0.7× 1.7k 0.7× 676 0.8× 45 0.3× 186 1.4× 85 2.8k
Cheng‐Kok Koh United States 30 2.9k 0.8× 1.7k 0.7× 710 0.9× 39 0.3× 164 1.2× 190 3.3k
M.A. Breuer United States 27 2.1k 0.6× 1.8k 0.7× 217 0.3× 85 0.6× 140 1.0× 122 2.4k
Evangeline F. Y. Young Hong Kong 30 2.7k 0.8× 1.5k 0.6× 481 0.6× 382 2.7× 75 0.6× 199 3.0k
Yoji Kajitani Japan 18 1.8k 0.5× 1.1k 0.4× 570 0.7× 389 2.8× 300 2.2× 102 2.3k
W. Maly United States 34 3.7k 1.0× 3.1k 1.3× 210 0.3× 409 2.9× 55 0.4× 181 4.1k
Ranga Vemuri United States 25 1.6k 0.4× 1.8k 0.8× 757 0.9× 44 0.3× 260 1.9× 282 2.5k

Countries citing papers authored by Chris Chu

Since Specialization
Citations

This map shows the geographic impact of Chris Chu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chris Chu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chris Chu more than expected).

Fields of papers citing papers by Chris Chu

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chris Chu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chris Chu. The network helps show where Chris Chu may publish in the future.

Co-authorship network of co-authors of Chris Chu

This figure shows the co-authorship network connecting the top 25 collaborators of Chris Chu. A scholar is included among the top collaborators of Chris Chu based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chris Chu. Chris Chu is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Wu, Gang, et al.. (2015). Gate Sizing and Vth Assignment for Asynchronous Circuits Using Lagrangian Relaxation. 53–60. 3 indexed citations
2.
Lin, Tao, Chris Chu, & Gang Wu. (2015). POLAR 3.0: An Ultrafast Global Placement Engine. International Conference on Computer Aided Design. 520–527. 10 indexed citations
3.
Wu, Gang, et al.. (2014). Asynchronous circuit placement by lagrangian relaxation. International Conference on Computer Aided Design. 641–646. 4 indexed citations
4.
Mak, Wai-Kei & Chris Chu. (2014). E-Beam Lithography Character and Stencil Co-Optimization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 33(5). 741–751. 5 indexed citations
5.
Wu, Gang, et al.. (2014). Asynchronous circuit placement by Lagrangian relaxation. 641–646. 4 indexed citations
6.
Xu, Yue & Chris Chu. (2011). MGR: multi-level global router. International Conference on Computer Aided Design. 250–255. 18 indexed citations
7.
Chu, Chris, et al.. (2010). FOARS. 27–34. 9 indexed citations
8.
Xu, Yue & Chris Chu. (2010). An auction based pre-processing technique to determine detour in global routing. International Conference on Computer Aided Design. 305–311. 1 indexed citations
9.
Xu, Yue, Yanheng Zhang, & Chris Chu. (2009). FastRoute 4.0: global router with efficient via minimization. Asia and South Pacific Design Automation Conference. 576–581. 85 indexed citations
10.
Xu, Yue, Yanheng Zhang, & Chris Chu. (2009). FastRoute 4.0: Global router with efficient via minimization. 576–581. 76 indexed citations
11.
Chu, Chris, et al.. (2008). DeFer. 161–166. 21 indexed citations
12.
Chu, Chris, et al.. (2004). An efficient routing tree construction algorithm with buffer insertion, wire sizing and obstacle considerations. Asia and South Pacific Design Automation Conference. 361–366. 5 indexed citations
13.
Chu, Chris, et al.. (2003). Retiming with Interconnect and Gate Delay. International Conference on Computer Aided Design. 221–226. 13 indexed citations
14.
Young, Evangeline F. Y., et al.. (2003). A New and Efficient Congestion Evaluation Model in Floorplanning: Wire Density Control with Twin Binary Trees. Design, Automation, and Test in Europe. 10856–10861. 6 indexed citations
15.
16.
Alpert, Charles J., et al.. (2002). Simultaneous driver sizing and buffer insertion using a delay penalty estimation technique. 104–109. 8 indexed citations
17.
Chu, Chris, et al.. (2000). Floorplan area minimization using Lagrangian relaxation. 174–179. 20 indexed citations
18.
Chen, Chung-Ping, Chris Chu, & Martin D. F. Wong. (1999). Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 18(7). 1014–1025. 133 indexed citations
19.
Chu, Chris & Martin D. F. Wong. (1998). A polynomial time optimal algorithm for simultaneous buffer and wire sizing. Design, Automation, and Test in Europe. 479–487. 7 indexed citations
20.
Chu, Chris & Martin D. F. Wong. (1997). A new approach to simultaneous buffer insertion and wire sizing. International Conference on Computer Aided Design. 614–621. 30 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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