Yoji Kajitani

3.3k total citations · 1 hit paper
102 papers, 2.3k citations indexed

About

Yoji Kajitani is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Yoji Kajitani has authored 102 papers receiving a total of 2.3k indexed citations (citations by other indexed papers that have themselves been cited), including 80 papers in Electrical and Electronic Engineering, 47 papers in Hardware and Architecture and 23 papers in Computer Networks and Communications. Recurrent topics in Yoji Kajitani's work include VLSI and FPGA Design Techniques (74 papers), VLSI and Analog Circuit Testing (34 papers) and Interconnection Networks and Systems (21 papers). Yoji Kajitani is often cited by papers focused on VLSI and FPGA Design Techniques (74 papers), VLSI and Analog Circuit Testing (34 papers) and Interconnection Networks and Systems (21 papers). Yoji Kajitani collaborates with scholars based in Japan, United States and China. Yoji Kajitani's co-authors include Shigetoshi Nakatake, Kunihiro Fujiyoshi, Hideyuki Murata, Hiroshi Murata, Keishi Sakanushi, Shuichi Ueno, Atsushi Takahashi, Hiroyuki Yamazaki, Xuliang Zhang and Dinesh P. Mehta and has published in prestigious journals such as IEEE Transactions on Vehicular Technology, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Theoretical Computer Science.

In The Last Decade

Yoji Kajitani

88 papers receiving 2.2k citations

Hit Papers

align trajectories sort by overperformance

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

VLSI module placement based on rectangle-packing by the sequence-pair

1996 537 citations Kunihiro Fujiyoshi, Shigetoshi Nakatake et al. profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Yoji Kajitani Japan	18	1.8k	1.1k	570	389	300	102	2.3k
Naveed A. Sherwani United States	14	1.0k 0.5×	671 0.6×	429 0.8×	88 0.2×	221 0.7×	64	1.3k
Errol L. Lloyd United States	21	995 0.5×	78 0.1×	1.9k 3.4×	145 0.4×	248 0.8×	66	2.3k
Spyros Tragoudas United States	21	1.2k 0.7×	947 0.9×	462 0.8×	52 0.1×	228 0.8×	237	1.7k
M.A. Breuer United States	27	2.1k 1.1×	1.8k 1.7×	217 0.4×	85 0.2×	140 0.5×	122	2.4k
Bryan Preas United States	17	689 0.4×	448 0.4×	188 0.3×	137 0.4×	76 0.3×	38	859
Claudio Zunino Italy	18	427 0.2×	299 0.3×	954 1.7×	111 0.3×	107 0.4×	72	1.2k
Gernot Metze United States	11	873 0.5×	1.1k 1.0×	1.0k 1.8×	17 0.0×	229 0.8×	29	1.8k
Ten‐Hwang Lai United States	23	660 0.4×	163 0.2×	1.4k 2.5×	58 0.1×	83 0.3×	58	1.7k
Huzur Saran India	17	334 0.2×	33 0.0×	572 1.0×	39 0.1×	188 0.6×	58	967
Bhabani P. Sinha India	15	384 0.2×	75 0.1×	428 0.8×	26 0.1×	102 0.3×	95	672

Countries citing papers authored by Yoji Kajitani

Since Specialization

Citations

This map shows the geographic impact of Yoji Kajitani's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yoji Kajitani with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yoji Kajitani more than expected).

Fields of papers citing papers by Yoji Kajitani

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yoji Kajitani. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yoji Kajitani. The network helps show where Yoji Kajitani may publish in the future.

Co-authorship network of co-authors of Yoji Kajitani

This figure shows the co-authorship network connecting the top 25 collaborators of Yoji Kajitani. A scholar is included among the top collaborators of Yoji Kajitani based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yoji Kajitani. Yoji Kajitani is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Zhu, Xiaoke, et al.. (2004). Multi-level placement with circuit schema based clustering in analog IC layouts. Asia and South Pacific Design Automation Conference. 406–411. 12 indexed citations

Zhang, Xuliang & Yoji Kajitani. (2004). Space-planning: placement of modules with controlled empty area by single-sequence. Asia and South Pacific Design Automation Conference. 25–30. 14 indexed citations

Fu, Ning, et al.. (2004). Abstraction and optimization of consistent floorplanning with pillar block constraints. Asia and South Pacific Design Automation Conference. 19–24.

Sakanushi, Keishi, et al.. (2002). Recognition of Floorplan by Parametric BSG for Reuse of Layout Design. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 85(4). 872–879.

Nakatake, Shigetoshi, et al.. (2002). Explicit Expression and Simultaneous Optimization of Placement and Routing for Analog IC Layouts. Asia and South Pacific Design Automation Conference. 467–472. 4 indexed citations

Takahashi, Atsushi, et al.. (2001). An Efficient Algorithm to Extract an Optimal Sub-Circuit by the Minimum Cut. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 84(5). 1301–1308. 1 indexed citations

Yamazaki, Hiroyuki, Keishi Sakanushi, Shigetoshi Nakatake, & Yoji Kajitani. (2000). The 3D-Packing by Meta Data Structure and Packing Heuristics. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 83(4). 639–645. 63 indexed citations

Takahashi, Wataru, et al.. (1999). Schedule-clock-tree routing for semi-synchronous circuits. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 82(11). 2431–2439. 7 indexed citations

Takahashi, Atsushi, et al.. (1998). Air-Pressure Model and Fast Algorithms for Zero-Wasted-Area Layout of General Floorplan. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 857–865. 4 indexed citations

10.

Kajitani, Yoji, et al.. (1998). Air-Pressure Model and Fast Algorithms for Zero-Wasted-Area Layout of General Floorplan(Special Section on Discrete Mathematics and Its Applications). IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 81(5). 857–865.

11.

Takahashi, Atsushi, et al.. (1997). Clock-tree routing realizing a clock-schedule for semi-synchronous circuits. International Conference on Computer Aided Design. 260–265. 16 indexed citations

12.

Takahashi, Atsushi, Wataru Takahashi, & Yoji Kajitani. (1997). Clock-Routing Driven Layout Methodology for Semi-Synchronous Circuit Design. 2 indexed citations

13.

Takahashi, Atsushi, et al.. (1997). Cost-Radius Balanced Spanning/Steiner Trees. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 689–694. 3 indexed citations

14.

Nakatake, Shigetoshi, Kunihiro Fujiyoshi, Hiroshi Murata, & Yoji Kajitani. (1996). Module placement on BSG-structure and IC layout applications. International Conference on Computer Aided Design. 484–491. 172 indexed citations

15.

Takashima, Yoshinori, Atsushi Takahashi, & Yoji Kajitani. (1996). Detailed-routability of FPGAs with extremal switch-block structures. 160–164. 2 indexed citations

16.

Murata, Hiroshi, Kunihiro Fujiyoshi, Shigetoshi Nakatake, & Yoji Kajitani. (1995). Rectangle-packing-based module placement. International Conference on Computer Aided Design. 472–479. 292 indexed citations

17.

Takahashi, Atsushi, Shuichi Ueno, & Yoji Kajitani. (1995). Universal Graphs for Graphs with Bounded Path-Width. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 78(4). 458–462. 3 indexed citations

18.

Ueno, Shuichi, et al.. (1991). A Note on Dual Trail Partition of a Plane Graph. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 1915–1917. 1 indexed citations

19.

Kajitani, Yoji, et al.. (1988). Ordering of the elements of a matroid such that its consecutive w elements are independent. Discrete Mathematics. 72(1-3). 187–194. 12 indexed citations

20.

Kajitani, Yoji & Takao Kawakami. (1980). Subgraph reachability of marked graphs.. 507–513. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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